IQ.Pilot Release Commit @ bec7652

This commit is contained in:
IQ.Lvbs history cleanup
2026-08-22 23:42:41 -05:00
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/*
* Copyright (c) 2005-2007, 2012-2013, 2019-2020 Qualcomm Technologies, Inc.
* All Rights Reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef AEESTDERR_H
#define AEESTDERR_H
//
// Basic Error Codes
//
//
#if defined(__hexagon__)
#define AEE_EOFFSET 0x80000400
#else
#define AEE_EOFFSET 0x00000000
#endif
/** @defgroup stdbasicerror Basic error codes
* @{
*/
#define AEE_SUCCESS 0 ///< No error
#define AEE_EUNKNOWN -1 ///< Unknown error (should not use this)
#define AEE_EFAILED (AEE_EOFFSET + 0x001) ///< General failure
#define AEE_ENOMEMORY (AEE_EOFFSET + 0x002) ///< Memory allocation failed because of insufficient RAM
#define AEE_ECLASSNOTSUPPORT (AEE_EOFFSET + 0x003) ///< Specified class unsupported
#define AEE_EVERSIONNOTSUPPORT (AEE_EOFFSET + 0x004) ///< Version not supported
#define AEE_EALREADYLOADED (AEE_EOFFSET + 0x005) ///< Object already loaded
#define AEE_EUNABLETOLOAD (AEE_EOFFSET + 0x006) ///< Unable to load object/applet
#define AEE_EUNABLETOUNLOAD (AEE_EOFFSET + 0x007) ///< Unable to unload
///< object/applet
#define AEE_EALARMPENDING (AEE_EOFFSET + 0x008) ///< Alarm is pending
#define AEE_EINVALIDTIME (AEE_EOFFSET + 0x009) ///< Invalid time
#define AEE_EBADCLASS (AEE_EOFFSET + 0x00A) ///< NULL class object
#define AEE_EBADMETRIC (AEE_EOFFSET + 0x00B) ///< Invalid metric specified
#define AEE_EEXPIRED (AEE_EOFFSET + 0x00C) ///< App/Component Expired
#define AEE_EBADSTATE (AEE_EOFFSET + 0x00D) ///< Process or thread is not in expected state
#define AEE_EBADPARM (AEE_EOFFSET + 0x00E) ///< Invalid parameter
#define AEE_ESCHEMENOTSUPPORTED (AEE_EOFFSET + 0x00F) ///< Invalid URL scheme
#define AEE_EBADITEM (AEE_EOFFSET + 0x010) ///< Value out of range
#define AEE_EINVALIDFORMAT (AEE_EOFFSET + 0x011) ///< Invalid format
#define AEE_EINCOMPLETEITEM (AEE_EOFFSET + 0x012) ///< Incomplete item, like length of a string is less that expected
#define AEE_ENOPERSISTMEMORY (AEE_EOFFSET + 0x013) ///< Insufficient flash
#define AEE_EUNSUPPORTED (AEE_EOFFSET + 0x014) ///< API not implemented
#define AEE_EPRIVLEVEL (AEE_EOFFSET + 0x015) ///< Privileges are insufficient
///< for this operation
#define AEE_ERESOURCENOTFOUND (AEE_EOFFSET + 0x016) ///< Unable to find specified
///< resource
#define AEE_EREENTERED (AEE_EOFFSET + 0x017) ///< Non re-entrant API
///< re-entered
#define AEE_EBADTASK (AEE_EOFFSET + 0x018) ///< API called in wrong task
///< context
#define AEE_EALLOCATED (AEE_EOFFSET + 0x019) ///< App/Module left memory
///< allocated when released.
#define AEE_EALREADY (AEE_EOFFSET + 0x01A) ///< Operation is already in
///< progress
#define AEE_EADSAUTHBAD (AEE_EOFFSET + 0x01B) ///< ADS mutual authorization
///< failed
#define AEE_ENEEDSERVICEPROG (AEE_EOFFSET + 0x01C) ///< Need service programming
#define AEE_EMEMPTR (AEE_EOFFSET + 0x01D) ///< bad memory pointer, expected to be NULL
#define AEE_EHEAP (AEE_EOFFSET + 0x01E) ///< An internal heap error was detected
#define AEE_EIDLE (AEE_EOFFSET + 0x01F) ///< Context (system, interface,
///< etc.) is idle
#define AEE_EITEMBUSY (AEE_EOFFSET + 0x020) ///< Context (system, interface,
///< etc.) is busy
#define AEE_EBADSID (AEE_EOFFSET + 0x021) ///< Invalid subscriber ID
#define AEE_ENOTYPE (AEE_EOFFSET + 0x022) ///< No type detected/found
#define AEE_ENEEDMORE (AEE_EOFFSET + 0x023) ///< Need more data/info
#define AEE_EADSCAPS (AEE_EOFFSET + 0x024) ///< ADS Capabilities do not
///< match those required for phone
#define AEE_EBADSHUTDOWN (AEE_EOFFSET + 0x025) ///< App failed to close properly
#define AEE_EBUFFERTOOSMALL (AEE_EOFFSET + 0x026) ///< Destination buffer given is
///< too small
///< or service exists or is
///< valid
#define AEE_EACKPENDING (AEE_EOFFSET + 0x028) ///< ACK pending on application
#define AEE_ENOTOWNER (AEE_EOFFSET + 0x029) ///< Not an owner authorized to
///< perform the operation
#define AEE_EINVALIDITEM (AEE_EOFFSET + 0x02A) ///< Current item is invalid, it can be a switch case or a pointer to memory
#define AEE_ENOTALLOWED (AEE_EOFFSET + 0x02B) ///< Not allowed to perform the
///< operation
#define AEE_EBADHANDLE (AEE_EOFFSET + 0x02C) ///< Invalid/Wrong handle
#define AEE_EINVHANDLE (AEE_EOFFSET + 0x02C) ///< Invalid handle - adding here as its defined in vendor AEEStdErr.h - needed to check valid handle in stub.c
#define AEE_EOUTOFHANDLES (AEE_EOFFSET + 0x02D) ///< Out of handles (Handle list is already full)
//Hole here
#define AEE_ENOMORE (AEE_EOFFSET + 0x02F) ///< No more items available --
///< reached end
#define AEE_ECPUEXCEPTION (AEE_EOFFSET + 0x030) ///< A CPU exception occurred
#define AEE_EREADONLY (AEE_EOFFSET + 0x031) ///< Cannot change read-only
///< object or parameter ( Parameter is in protected mode)
#define AEE_ERPC (AEE_EOFFSET + 0x200) ///< Error due to fastrpc implementation
#define AEE_EFILE (AEE_EOFFSET + 0x201) ///<File handling related error
//NOTE: Used in both HLOS and DSP.
#define AEE_ENOSUCH (39) ///< No such name, port, socket
#define AEE_EINTERRUPTED (46) ///< Waitable call is interrupted,
///< the user should return to the HLOS and retry the call
#define AEE_ECONNRESET (104) ///< Connection reset by peer
#define AEE_EWOULDBLOCK (516) ///< Operation would block if not
///< non-blocking; wait and try
///< again
/**
* @}
*/
/** @defgroup sigverifyerror Sigverify error codes
* @{
*/
#define AEE_EINVALIDMSG (AEE_EOFFSET + 0x032) ///< Invalid SMD message from APPS
#define AEE_EINVALIDTHREAD (AEE_EOFFSET + 0x033) ///< Invalid thread
#define AEE_EINVALIDPROCESS (AEE_EOFFSET + 0x034) ///< Invalid Process
#define AEE_EINVALIDFILENAME (AEE_EOFFSET + 0x035) ///< Invalid filename
#define AEE_EINVALIDDIGESTSIZE (AEE_EOFFSET + 0x036) ///< Invalid digest size
#define AEE_EINVALIDSEGS (AEE_EOFFSET + 0x037) ///< Invalid segments
#define AEE_EINVALIDSIGNATURE (AEE_EOFFSET + 0x038) ///< Invalid signature
#define AEE_EINVALIDDOMAIN (AEE_EOFFSET + 0x039) ///< Invalid DSP domain
#define AEE_EINVALIDFD (AEE_EOFFSET + 0x03A) ///< Invalid file descriptor
#define AEE_EINVALIDDEVICE (AEE_EOFFSET + 0x03B) ///< Invalid Device or Device node open failed for the domain
#define AEE_EINVALIDMODE (AEE_EOFFSET + 0x03C) ///< Invalid Mode
#define AEE_EINVALIDPROCNAME (AEE_EOFFSET + 0x03D) ///< Invalid Process name
#define AEE_ENOSUCHMOD (AEE_EOFFSET + 0x03E) ///< No such module
#define AEE_ENOSUCHINSTANCE (AEE_EOFFSET + 0x03F) ///< No instance in the list lookup
#define AEE_ENOSUCHTHREAD (AEE_EOFFSET + 0x040) ///< No such thread
#define AEE_ENOSUCHPROCESS (AEE_EOFFSET + 0x041) ///< No such process
#define AEE_ENOSUCHSYMBOL (AEE_EOFFSET + 0x042) ///< No such symbol( dlsym for the symbol failed)
#define AEE_ENOSUCHDEVICE (AEE_EOFFSET + 0x043) ///< No such device
#define AEE_ENOSUCHPROP (AEE_EOFFSET + 0x044) ///< No such dal property
#define AEE_ENOSUCHFILE (AEE_EOFFSET + 0x045) ///< No such file found
#define AEE_ENOSUCHHANDLE (AEE_EOFFSET + 0x046) ///< No such handle
#define AEE_ENOSUCHSTREAM (AEE_EOFFSET + 0x047) ///< No such stream
#define AEE_ENOSUCHMAP (AEE_EOFFSET + 0x048) ///< No mapping exists for this address on DSP
#define AEE_ENOSUCHREGISTER (AEE_EOFFSET + 0x049) ///< No such register
#define AEE_ENOSUCHCLIENT (AEE_EOFFSET + 0x04A) ///< No such QDI client
#define AEE_EBADDOMAIN (AEE_EOFFSET + 0x04B) ///< Bad domain (not initialized)
#define AEE_EBADOFFSET (AEE_EOFFSET + 0x04C) ///< Bad buffer/page/heap offset
#define AEE_EBADSIZE (AEE_EOFFSET + 0x04D) ///< Bad buffer/page/heap size
#define AEE_EBADPERMS (AEE_EOFFSET + 0x04E) ///< Bad FILE/MAP/MEM permissions
#define AEE_EBADFD (AEE_EOFFSET + 0x04F) ///< Bad file descriptor
#define AEE_EBADPID (AEE_EOFFSET + 0x050) ///< Bad PID from HLOS
#define AEE_EBADTID (AEE_EOFFSET + 0x051) ///< Bad TID
#define AEE_EBADELF (AEE_EOFFSET + 0x052) ///< Bad elf file
#define AEE_EBADASID (AEE_EOFFSET + 0x053) ///< Bad asid
#define AEE_EBADCONTEXT (AEE_EOFFSET + 0x054) ///< Bad context
#define AEE_EBADMEMALIGN (AEE_EOFFSET + 0x055) ///< Bad memory alignment
#define AEE_EIOCTL (AEE_EOFFSET + 0x056) ///< ioctl call failed
#define AEE_EFOPEN (AEE_EOFFSET + 0x057) ///< file open error or device node open failed for DSP domain
#define AEE_EFGETS (AEE_EOFFSET + 0x058) ///< file get string error
#define AEE_EFFLUSH (AEE_EOFFSET + 0x059) ///< file flush error
#define AEE_EFCLOSE (AEE_EOFFSET + 0x05A) ///< file close error
#define AEE_EEOF (AEE_EOFFSET + 0x05B) ///< File EOF reached
#define AEE_EFREAD (AEE_EOFFSET + 0x05C) ///< file read failed
#define AEE_EFWRITE (AEE_EOFFSET + 0x05D) ///< file write failed
#define AEE_EFGETPOS (AEE_EOFFSET + 0x05E) ///< file get position failed
#define AEE_EFSETPOS (AEE_EOFFSET + 0x05F) ///< file set position failed
#define AEE_EFTELL (AEE_EOFFSET + 0x060) ///< file tell position failed
#define AEE_EFSEEK (AEE_EOFFSET + 0x061) ///< file seek failed
#define AEE_EFLEN (AEE_EOFFSET + 0x062) ///< file len greater than expected
#define AEE_EGETENV (AEE_EOFFSET + 0x063) ///< apps_std get enviroment failed
#define AEE_ESETENV (AEE_EOFFSET + 0x064) ///< apps_std set enviroment failed
#define AEE_EMMAP (AEE_EOFFSET + 0x065) ///< mmap failed
#define AEE_EIONMAP (AEE_EOFFSET + 0x066) ///< ion map failed
#define AEE_EIONALLOC (AEE_EOFFSET + 0x067) ///< ion alloc failed
#define AEE_ENORPCMEMORY (AEE_EOFFSET + 0x068) ///< ION memory allocation failed
#define AEE_ENOROOTOFTRUST (AEE_EOFFSET + 0x069) ///< No root of trust for sigverify
#define AEE_ENOTLOCKED (AEE_EOFFSET + 0x06A) ///< Unlock failed, not locked before
#define AEE_ENOTINITIALIZED (AEE_EOFFSET + 0x06B) ///< Not initialized
#define AEE_EUNSUPPORTEDAPI (AEE_EOFFSET + 0x06C) ///< unsupported API/request ID
#define AEE_EUNPACK (AEE_EOFFSET + 0x06D) ///< unpacking command failed
#define AEE_EPOLL (AEE_EOFFSET + 0x06E) ///< error while polling for event
#define AEE_EEVENTREAD (AEE_EOFFSET + 0x06F) ///< event read failed
#define AEE_EMAXBUFS (AEE_EOFFSET + 0x070) ///< Maximum buffers
#define AEE_EINVARGS (AEE_EOFFSET + 0x071) ///< Invalid Arguments
#define AEE_ECONNREFUSED (AEE_EOFFSET + 0x072) ///< Connection refused to DSP
#define AEE_EUNSIGNEDMOD (AEE_EOFFSET + 0x081) ///< test-sig not found, Unsigned shared object
#define AEE_EINVALIDHASH (AEE_EOFFSET + 0x082) ///< test-sig not found, Invalid hash object
#define AEE_EBADVA (AEE_EOFFSET + 0x083) ///< Bad VA address
#define AEE_ENOSUCHJOB (AEE_EOFFSET + 0x084) ///< No such job
#define AEE_ENOSUCHGROUP (AEE_EOFFSET + 0x084) ///< No such static pd group
#define AEE_EBADMAPREFCNT (AEE_EOFFSET + 0x085) ///< Bad map reference count
#define AEE_EBADPAGECNT (AEE_EOFFSET + 0x086) ///< Bad page count
#define AEE_EMAPALREADYPRESENT (AEE_EOFFSET + 0x087) ///< Map already present
#define AEE_ENOFREESECTION (AEE_EOFFSET + 0x088) ///< No more free sections available
#define AEE_U2GCLIENT_OPEN (AEE_EOFFSET + 0x089) ///< u2g client open failed
/**
* @}
*/
/** @defgroup smderror SMD error codes
* @{
*/
#if defined(__hexagon__)
#define AEE_EGLINK_OFFSET (AEE_EOFFSET + 0x100) ///< SMD errors offset
#define AEE_EGLINKBADPACKET (AEE_EOFFSET + 0x101) ///< SMD invalid packet size
#define AEE_EGLINKALREADYOPEN (AEE_EOFFSET + 0x102) ///< SMD port is already open
#define AEE_EGLINKOPENFAILED (AEE_EOFFSET + 0x103) ///< SMD port open failed
#define AEE_EGLINKWRITE (AEE_EOFFSET + 0x104) ///< SMD port write failed
#define AEE_EGLINKREGISTER (AEE_EOFFSET + 0x105) ///< SMD port register callback failed
#else
#define AEE_ESMD_OFFSET (AEE_EOFFSET + 0x100) ///< SMD errors offset
#define AEE_ESMDBADPACKET (AEE_EOFFSET + 0x101) ///< SMD invalid packet size
#define AEE_ESMDALREADYOPEN (AEE_EOFFSET + 0x102) ///< SMD port is already open
#define AEE_ESMDOPENFAILED (AEE_EOFFSET + 0x103) ///< SMD port open failed
#endif
/**
* @}
*/
/** @defgroup dalerror DAL error codes
* @{
*/
#define AEE_EDAL_OFFSET (AEE_EOFFSET + 0x120) ///< Dal error offset
#define AEE_EDALDEVATTACH (AEE_EOFFSET + 0x121) ///< DAL attach error
#define AEE_EDALINTREGISTER (AEE_EOFFSET + 0x122) ///< DAL interrupt register error
#define AEE_EDALINTUNREGISTER (AEE_EOFFSET + 0x123) ///< Dal interrupt unregister error
#define AEE_EDALGETPROP (AEE_EOFFSET + 0x124) ///< Dal get property
#define AEE_EDALGETVAL (AEE_EOFFSET + 0x125) ///< Dal get property value
#define AEE_EDCVSREQUEST (AEE_EOFFSET + 0x126) ///< Dal get property value
/**
* @}
*/
/** @defgroup qurterror QURT error codes
* @{
*/
#define AEE_EQURT_OFFSET (AEE_EOFFSET + 0x140) ///< QURT error offset
#define AEE_EQURTREGIONCREATE (AEE_EOFFSET + 0x141) ///< QURT region create failed
#define AEE_EQURTCACHECLEAN (AEE_EOFFSET + 0x142) ///< QURT cache clean failed
#define AEE_EQURTREGIONGETATTR (AEE_EOFFSET + 0x143) ///< QURT region get attribute failed
#define AEE_EQURTBADREGIONPERMS (AEE_EOFFSET + 0x144) ///< QURT bad permissions for region
#define AEE_EQURTMEMPOOLADD (AEE_EOFFSET + 0x145) ///< QURT Add to memory pool failed
#define AEE_EQURTREGISTERDEV (AEE_EOFFSET + 0x146) ///< QURT register device failed
#define AEE_EQURTMEMPOOLCREATE (AEE_EOFFSET + 0x147) ///< QURT create memory pool failed
#define AEE_EQURTGETVA (AEE_EOFFSET + 0x148) ///< QURT get VA failed
#define AEE_EQURTREGIONDELETE (AEE_EOFFSET + 0x149) ///< QURT region delete failed
#define AEE_EQURTMEMPOOLATTACH (AEE_EOFFSET + 0x14A) ///< QURT memory pool attach failed
#define AEE_EQURTTHREADCREATE (AEE_EOFFSET + 0x14B) ///< QURT thread create failed
#define AEE_EQURTCOPYTOUSER (AEE_EOFFSET + 0x14C) ///< QURT copy to user memory failed
#define AEE_EQURTMEMMAPCREATE (AEE_EOFFSET + 0x14D) ///< QURT map create failed
#define AEE_EQURTINVHANDLE (AEE_EOFFSET + 0x14E) ///< QURT Invalid client handle
#define AEE_EQURTBADASID (AEE_EOFFSET + 0x14F) ///< QURT Bad ASIC from QURT
#define AEE_EQURTOPENFAILED (AEE_EOFFSET + 0x150) ///< QURT QDI open failed
#define AEE_EQURTCOPYFROMUSER (AEE_EOFFSET + 0x151) ///< QURT Copy from user failed
#define AEE_EQURTLINELOCK (AEE_EOFFSET + 0x152) ///< QURT Line lock failed
#define AEE_EQURTQDIDEFMETHOD (AEE_EOFFSET + 0x153) ///< QURT QDI default method failed
#define AEE_EQURTCREATEHANDLE (AEE_EOFFSET + 0x154) ///< QURT create handle from obj failed
#define AEE_EQURTWRITABLEMEM (AEE_EOFFSET + 0x155) ///< QURT CPZ migration writable mem
#define AEE_EQURTTHREADCREATEDEF (AEE_EOFFSET + 0x156) ///< QURT thread create def
#define AEE_EQURTLOOKUPVA (AEE_EOFFSET + 0x157) ///< QURT lookup VA
#define AEE_EQURTLOOKUPPA (AEE_EOFFSET + 0x158) ///< QURT lookup PA
#define AEE_EQURTMIGRATESECURE (AEE_EOFFSET + 0x159) ///< QURT CPZ migration failure
#define AEE_EQURTQDIOPEN (AEE_EOFFSET + 0X160) ///< QURT QDI open failure
#define AEE_EQURTMAPREMOVE (AEE_EOFFSET + 0X161) ///< QURT map remove failure
#define AEE_EQURTQDICLOSE (AEE_EOFFSET + 0X162) ///< QURT QDI close failed
#define AEE_EQURTWAIT (AEE_EOFFSET + 0X163) ///< QURT Futex wait failed
/**
* @}
*/
/** @defgroup mmpmerr MMPM error codes
* @{
*/
#define AEE_EMMPM_OFFSET (AEE_EOFFSET + 0x170) ///< MMPM errors offset
#define AEE_EMMPMREQUEST (AEE_EOFFSET + 0x171) ///< MMPM Power request to failed
#define AEE_EMMPMRELEASE (AEE_EOFFSET + 0x172) ///< MMPM Release request failed
#define AEE_EMMPMSETPARAM (AEE_EOFFSET + 0x173) ///< MMPM set param request failed
#define AEE_EMMPMREGISTER (AEE_EOFFSET + 0x174) ///< MMPM Register request failed
#define AEE_EMMPMGETINFO (AEE_EOFFSET + 0x175) ///< MMPM Get info failed
#define AEE_EMAX_MMPM_CLIENTS (AEE_EOFFSET + 0x176) ///< MMPM Reached maximum clients per PD(HAP_MAX_CLIENTS)
#define AEE_EDCVSREGISTER (AEE_EOFFSET + 0x177) ///< ADSP DCVS client registration failed
#define AEE_PDRREGFAIL (AEE_EOFFSET + 0x178) ///< Error Callback Services Registration failed for PD
/**
* @}
*/
#define AEE_DEFAULT_PROCESS (AEE_EOFFSET + 0x180) ///< Default process in Guest OS is not present
#define AEE_ENULLCONTEXT (AEE_EOFFSET + 0x181) ///< User NULL context vote
#define AEE_EINVALIDJOB (AEE_EOFFSET + 0x182) ///< AsyncRPC Invalid job
#define AEE_EBUSY (AEE_EOFFSET + 0x183) ///< AsyncRPC Pending job
/** @defgroup heaperror Heap error codes
* @{
*/
#define E_APPS_BUSY_RETRY_LATER (AEE_EOFFSET + 0x190) ///< Retry because the apps is busy
#define E_HLOS_CAP_REACHED (AEE_EOFFSET + 0x191) ///< cannot allocate any more hlos mem
#define E_DPOOL_CAP_REACHED (AEE_EOFFSET + 0x192) ///< cannot allocate any more physpool mem
#define E_NO_MORE_FREE_SECTIONS (AEE_EOFFSET + 0x193) ///< No more free sections available to grow heap
/**
* @}
*/
#endif /* #ifndef AEESTDERR_H */

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/*==============================================================================
@file
HAP_power.h
@brief
Header file of DSP power APIs.
Copyright (c) 2015,2019 Qualcomm Technologies, Inc.
All rights reserved. Qualcomm Proprietary and Confidential.
==============================================================================*/
#ifndef _HAP_POWER_H
#define _HAP_POWER_H
#include "AEEStdErr.h"
//#include <string.h>
//#include <stdlib.h>
#define boolean char
#define FALSE 0
#define TRUE 1
#define uint64 unsigned long long
#define uint32 unsigned int
#define NULL 0
#ifdef __cplusplus
extern "C" {
#endif
//Add a weak reference so shared objects do not throw link error
#pragma weak HAP_power_destroy_client
/**
* Possible error codes returned
*/
typedef enum {
HAP_POWER_ERR_UNKNOWN = -1,
HAP_POWER_ERR_INVALID_PARAM = -2,
HAP_POWER_ERR_UNSUPPORTED_API = -3
} HAP_power_error_codes;
/** Payload for HAP_power_set_mips_bw */
typedef struct {
boolean set_mips; /**< Set to TRUE to request MIPS */
unsigned int mipsPerThread; /**< mips requested per thread, to establish a minimal clock frequency per HW thread */
unsigned int mipsTotal; /**< Total mips requested, to establish total number of MIPS required across all HW threads */
boolean set_bus_bw; /**< Set to TRUE to request bus_bw */
uint64 bwBytePerSec; /**< Max bus BW requested (bytes per second) */
unsigned short busbwUsagePercentage; /**< Percentage of time during which bwBytesPerSec BW is required from the bus (0..100) */
boolean set_latency; /**< Set to TRUE to set latency */
int latency; /**< maximum hardware wakeup latency in microseconds. The higher the value,
* the deeper state of sleep that can be entered but the longer it may take
* to awaken. Only values > 0 are supported (1 microsecond is the smallest valid value) */
} HAP_power_mips_bw_payload;
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** Clock frequency match type*/
typedef enum {
HAP_FREQ_AT_LEAST, /**< Matches at least the specified frequency. */
HAP_FREQ_AT_MOST, /**< Matches at most the specified frequency. */
HAP_FREQ_CLOSEST, /**< Closest match to the specified frequency. */
HAP_FREQ_EXACT, /**< Exact match with the specified frequency. */
HAP_FREQ_MAX_COUNT /**< Maximum count. */
} HAP_freq_match_type;
/**
* @} // HAP_power_enums
*/
/** Configuration for bus bandwidth */
typedef struct {
boolean set_bus_bw; /**< Set to TRUE to request bus_bw */
uint64 bwBytePerSec; /**< Max bus BW requested (bytes per second) */
unsigned short busbwUsagePercentage; /**< Percentage of time during which bwBytesPerSec BW is required from the bus (0..100) */
} HAP_power_bus_bw;
/**
* @brief Payload for vapps power request
* vapps core is used for Video post processing
*/
typedef struct {
boolean set_clk; /**< Set to TRUE to request clock frequency */
unsigned int clkFreqHz; /**< Clock frequency in Hz */
HAP_freq_match_type freqMatch; /**< Clock frequency match */
HAP_power_bus_bw dma_ext; /**< DMA external bus bandwidth */
HAP_power_bus_bw hcp_ext; /**< HCP external bus bandwidth */
HAP_power_bus_bw dma_int; /**< DMA internal bus bandwidth */
HAP_power_bus_bw hcp_int; /**< HCP internal bus bandwidth */
} HAP_power_vapss_payload;
/**
* @brief Payload for vapps_v2 power request
* Supported in targets which have split VAPPS core(DMA and HCP) form Hana onwards
*/
typedef struct {
boolean set_dma_clk; /**< Set to TRUE to reqeust DMA clock frequency */
boolean set_hcp_clk; /**< Set to TRUE to reqeust HCP clock frequency */
unsigned int dmaClkFreqHz; /**< DMA Clock frequency in Hz */
unsigned int hcpClkFreqHz; /**< HCP Clock frequency in Hz */
HAP_freq_match_type freqMatch; /**< Clock frequency match type */
HAP_power_bus_bw dma_ext; /**< DMA external bus bandwidth */
HAP_power_bus_bw hcp_ext; /**< HCP external bus bandwidth */
HAP_power_bus_bw dma_int; /**< DMA internal bus bandwidth */
HAP_power_bus_bw hcp_int; /**< HCP internal bus bandwidth */
} HAP_power_vapss_payload_v2;
/** Payload for HAP_power_set_HVX */
typedef struct {
boolean power_up; /**< Set to TRUE to turn on HVX, and FALSE to turn off. */
} HAP_power_hvx_payload;
/**
* Payload for HAP_power_set_HMX
* Supported from Lahaina onwards*/
typedef struct {
boolean power_up; /**< Set to TRUE to turn on HMX, and FALSE to turn off. */
} HAP_power_hmx_payload;
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** Payload for HAP power client classes */
typedef enum {
HAP_POWER_UNKNOWN_CLIENT_CLASS = 0x00, /**< Unknown client class */
HAP_POWER_AUDIO_CLIENT_CLASS = 0x01, /**< Audio client class */
HAP_POWER_VOICE_CLIENT_CLASS = 0x02, /**< Voice client class */
HAP_POWER_COMPUTE_CLIENT_CLASS = 0x04, /**< Compute client class */
HAP_POWER_STREAMING_1HVX_CLIENT_CLASS = 0x08, /**< Camera streaming with 1 HVX client class */
HAP_POWER_STREAMING_2HVX_CLIENT_CLASS = 0x10, /**< Camera streaming with 2 HVX client class */
} HAP_power_app_type_payload;
/**
* @} // HAP_power_enums
*/
/** Payload for HAP_power_set_linelock */
typedef struct {
void* startAddress; /**< Start address of the memory region to be locked. */
uint32 size; /**< Size (bytes) of the memory region to be locked. Set size
* to 0 to unlock memory. */
uint32 throttleBlockSize; /**< Block size for throttling, in bytes;
* 0 for no throttling. The region to be locked will be divided into
* blocks of this size for throttling purposes.
* Use for locking larger cache blocks.
* Applicable only when enabling line locking.Only ONE throttled linelock call is supported at this time.
* You can linelock additional regions (without throttling) using HAP_power_set_linelock_nothrottle*/
uint32 throttlePauseUs; /**< Pause to be applied between locking each block, in microseconds. Applicable only when enabling line locking*/
} HAP_power_linelock_payload;
/** Payload for HAP_power_set_linelock_nothrottle */
typedef struct {
void* startAddress; /**< Start address of the memory region to be locked. */
uint32 size; /**< Size (bytes) of the memory region to be locked. Set size to 0
* to unlock memory */
} HAP_power_linelock_nothrottle_payload;
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** Option for dcvs payload */
typedef enum {
HAP_DCVS_ADJUST_UP_DOWN = 0x1, /**< increase and decrease core/bus clock speed. */
HAP_DCVS_ADJUST_ONLY_UP = 0x2, /**< restricts DCVS from lowering the clock speed below the requested value . */
} HAP_power_dcvs_payload_option;
/**
* @} // HAP_power_enums
*/
/** Payload for HAP_power_set_DCVS */
typedef struct {
boolean dcvs_enable; /**< Set to TRUE to participate in DCVS, and FALSE otherwise. */
HAP_power_dcvs_payload_option dcvs_option; /**< Set to one of
* HAP_DCVS_ADJUST_UP_DOWN - Allows for DCVS to adjust up and down.
* HAP_DCVS_ADJUST_ONLY_UP - Allows for DCVS to adjust up only. */
} HAP_power_dcvs_payload;
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** Voltage corners for HAP DCVS V2 interface */
typedef enum {
HAP_DCVS_VCORNER_DISABLE,
HAP_DCVS_VCORNER_SVS2,
HAP_DCVS_VCORNER_SVS,
HAP_DCVS_VCORNER_SVS_PLUS,
HAP_DCVS_VCORNER_NOM,
HAP_DCVS_VCORNER_NOM_PLUS,
HAP_DCVS_VCORNER_TURBO,
HAP_DCVS_VCORNER_TURBO_PLUS,
HAP_DCVS_VCORNER_MAX = 255,
} HAP_dcvs_voltage_corner_t;
/**
* @} // HAP_power_enums
*/
#define HAP_DCVS_VCORNER_SVSPLUS HAP_DCVS_VCORNER_SVS_PLUS
#define HAP_DCVS_VCORNER_NOMPLUS HAP_DCVS_VCORNER_NOM_PLUS
/** DCVS parameters for HAP_power_dcvs_v2_payload */
typedef struct {
HAP_dcvs_voltage_corner_t target_corner; /**< target voltage corner */
HAP_dcvs_voltage_corner_t min_corner; /**< minimum voltage corner */
HAP_dcvs_voltage_corner_t max_corner; /**< maximum voltage corner */
uint32 param1; /**< reserved */
uint32 param2; /**< reserved */
uint32 param3; /**< reserved */
} HAP_dcvs_params_t;
/** Core clock parameters for HAP_power_dcvs_v3_payload */
typedef struct {
HAP_dcvs_voltage_corner_t target_corner; /**< target voltage corner */
HAP_dcvs_voltage_corner_t min_corner; /**< minimum voltage corner */
HAP_dcvs_voltage_corner_t max_corner; /**< maximum voltage corner */
uint32 param1; /**< reserved */
uint32 param2; /**< reserved */
uint32 param3; /**< reserved */
} HAP_core_params_t;
/** Bus clock parameters for HAP_power_dcvs_v3_payload */
typedef struct {
HAP_dcvs_voltage_corner_t target_corner; /**< target voltage corner */
HAP_dcvs_voltage_corner_t min_corner; /**< minimum voltage corner */
HAP_dcvs_voltage_corner_t max_corner; /**< maximum voltage corner */
uint32 param1; /**< reserved */
uint32 param2; /**< reserved */
uint32 param3; /**< reserved */
} HAP_bus_params_t;
/** DCVS v3 parameters for HAP_power_dcvs_v3_payload */
typedef struct {
uint32 param1; /**< reserved */
uint32 param2; /**< reserved */
uint32 param3; /**< reserved */
uint32 param4; /**< reserved */
uint32 param5; /**< reserved */
uint32 param6; /**< reserved */
} HAP_dcvs_v3_params_t;
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** option for dcvs_v2 payload */
typedef enum {
HAP_DCVS_V2_ADJUST_UP_DOWN = 0x1, /**< Allows for DCVS to adjust up and down. */
HAP_DCVS_V2_ADJUST_ONLY_UP = 0x2, /**< Allows for DCVS to adjust up only. */
HAP_DCVS_V2_POWER_SAVER_MODE = 0x4, /**< HAP_DCVS_POWER_SAVER_MODE - Higher thresholds for power efficiency. */
HAP_DCVS_V2_POWER_SAVER_AGGRESSIVE_MODE = 0x8, /**< HAP_DCVS_POWER_SAVER_AGGRESSIVE_MODE - Higher thresholds for power efficiency with faster ramp down. */
HAP_DCVS_V2_PERFORMANCE_MODE = 0x10, /**< HAP_DCVS_PERFORMANCE_MODE - Lower thresholds for maximum performance */
HAP_DCVS_V2_DUTY_CYCLE_MODE = 0x20, /**< HAP_DCVS_DUTY_CYCLE_MODE - only for HVX based clients.
* For streaming class clients:
* > detects periodicity based on HVX usage
* > lowers clocks in the no HVX activity region of each period.
* For compute class clients:
* > Lowers clocks on no HVX activity detects and brings clocks up on detecting HVX activity again.
* > Latency involved in bringing up the clock with be at max 1 to 2 ms. */
} HAP_power_dcvs_v2_payload_option;
/**
* @} // HAP_power_enums
*/
/** Payload for HAP_power_set_DCVS_v2 */
typedef struct {
boolean dcvs_enable; /**< Set to TRUE to participate in DCVS, and FALSE otherwise */
HAP_power_dcvs_v2_payload_option dcvs_option; /**< Set to one of HAP_power_dcvs_v2_payload_option */
boolean set_latency; /**< TRUE to set latency parameter, otherwise FALSE */
uint32 latency; /**< sleep latency */
boolean set_dcvs_params; /**< TRUE to set DCVS params, otherwise FALSE */
HAP_dcvs_params_t dcvs_params; /**< DCVS parameters */
} HAP_power_dcvs_v2_payload;
/** Payload for HAP_power_set_DCVS_v3 */
typedef struct {
boolean set_dcvs_enable; /**< TRUE to consider DCVS enable/disable and option parameters, otherwise FALSE */
boolean dcvs_enable; /**< Set to TRUE to participate in DCVS, and FALSE otherwise. */
HAP_power_dcvs_v2_payload_option dcvs_option; /**< Set to one of HAP_power_dcvs_v2_payload_option */
boolean set_latency; /**< TRUE to consider latency parameter, otherwise FALSE */
uint32 latency; /**< sleep latency */
boolean set_core_params; /**< TRUE to consider core clock params, otherwise FALSE */
HAP_core_params_t core_params; /**< Core clock parameters */
boolean set_bus_params; /**< TRUE to consider bus clock params, otherwise FALSE */
HAP_bus_params_t bus_params; /**< Bus clock parameters */
boolean set_dcvs_v3_params; /**< TRUE to consider DCVS v3 params, otherwise FALSE */
HAP_dcvs_v3_params_t dcvs_v3_params; /**< DCVS v3 parameters */
boolean set_sleep_disable; /**< TRUE to consider sleep disable/enable parameter, otherwise FALSE */
boolean sleep_disable; /**< TRUE to disable sleep/LPM modes, FALSE to enable */
} HAP_power_dcvs_v3_payload;
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** Type for dcvs update request */
typedef enum {
HAP_POWER_UPDATE_DCVS = 1,
HAP_POWER_UPDATE_SLEEP_LATENCY,
HAP_POWER_UPDATE_DCVS_PARAMS,
} HAP_power_update_type_t;
/**
* @} // HAP_power_enums
*/
/** Payload for DCVS update */
typedef struct {
boolean dcvs_enable; /**< TRUE for DCVS enable and FALSE for DCVS disable */
HAP_power_dcvs_v2_payload_option dcvs_option; /**< Requested DCVS policy in case DCVS enable is TRUE */
} HAP_power_update_dcvs_t;
/** Payload for latency update */
typedef struct {
boolean set_latency; /**< TRUE if sleep latency request has to be considered */
unsigned int latency; /**< Sleep latency request in micro seconds */
} HAP_power_update_latency_t;
/** Payload for DCVS params update */
typedef struct {
boolean set_dcvs_params; /**< Flag to mark DCVS params structure validity, TRUE for valid DCVS
*params request and FALSE otherwise */
HAP_dcvs_params_t dcvs_params; /**< Intended DCVS params if set_dcvs_params is set to TRUE */
} HAP_power_update_dcvs_params_t;
/** Payload for HAP_power_set_DCVS_v2 */
typedef struct {
HAP_power_update_type_t update_param; /**< Type for which param to update */
union {
HAP_power_update_dcvs_t dcvs_payload;
HAP_power_update_latency_t latency_payload;
HAP_power_update_dcvs_params_t dcvs_params_payload;
}; /**< Update payload for DCVS, latency or DCVS params */
} HAP_power_dcvs_v2_update_payload;
/** Payload for HAP_power_set_streamer */
typedef struct {
boolean set_streamer0_clk; /**< Set streamer 0 clock */
boolean set_streamer1_clk; /**< Set streamer 1 clock */
unsigned int streamer0_clkFreqHz; /**< Streamer 0 clock frequency */
unsigned int streamer1_clkFreqHz; /**< Streamer 1 clock frequency */
HAP_freq_match_type freqMatch; /**< Clock frequency match */
uint32 param1; /**< Reserved for future streamer parameters */
uint32 param2; /**< Reserved for future streamer parameters */
uint32 param3; /**< Reserved for future streamer parameters */
} HAP_power_streamer_payload;
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** Identifies the HAP power request type */
typedef enum {
HAP_power_set_mips_bw = 1, /**< Requests for MIPS. Provides
* fine-grained control to set MIPS values.
* Payload is set to HAP_power_payload */
HAP_power_set_HVX, /**< Requests to enable / disable HVX
* Payload is set to HAP_power_hvx_payload */
HAP_power_set_apptype, /**< Sets the app_type
* Payload is set to HAP_power_app_type_payload */
HAP_power_set_linelock, /**< Sets the throttled L2 cache line locking parameters.
* Only one throttled call is supported at this time. Additional
* un-throttled line-locks can be performed using HAP_power_set_linelock_nothrottle
* Payload is set to HAP_power_linelock_payload */
HAP_power_set_DCVS, /**< Requests to participate / stop participating in DCVS */
HAP_power_set_linelock_nothrottle, /**< Sets the L2 cache line locking parameters (non-throttled).
* Payload is set to HAP_power_linelock_nothrottle_payload */
HAP_power_set_DCVS_v2, /**< Requests to participate / stop participating in DCVS_v2 */
HAP_power_set_vapss, /**< Sets the VAPSS core clock and DDR/IPNOC bandwidth
* Payload is set to HAP_power_vapss_payload */
HAP_power_set_vapss_v2, /**< Sets the VAPSS core DMA/HCP clocks and DDR/IPNOC bandwidths
* Payload is set to HAP_power_vapss_payload_v2 */
HAP_power_set_dcvs_v2_update, /**< Updates DCVS params
* Payload is set to HAP_power_dcvs_v2_update_payload */
HAP_power_set_streamer, /**< Sets the streamer core clocks
* Payload is set to HAP_power_streamer_payload */
HAP_power_set_DCVS_v3, /**< Updates DCVS params
* Payload is set to HAP_power_dcvs_v3_payload */
HAP_power_set_HMX, /**< Requests to enable / disable HMX
* Payload is set to HAP_power_hmx_payload */
} HAP_Power_request_type;
/**
* @} // HAP_power_enums
*/
/** Data type to change power values on the DSP */
typedef struct {
HAP_Power_request_type type; /**< Identifies the request type */
union{
HAP_power_mips_bw_payload mips_bw; /**< Requests for performance level */
HAP_power_vapss_payload vapss; /**< Sets the VAPSS core clock and DDR/IPNOC bandwidth */
HAP_power_vapss_payload_v2 vapss_v2; /**< Sets the VAPSS core clock and DDR/IPNOC bandwidth */
HAP_power_streamer_payload streamer; /**< Sets the streamer core clocks */
HAP_power_hvx_payload hvx; /**< Requests to enable / disable HVX */
HAP_power_app_type_payload apptype; /**< Sets the app_type */
HAP_power_linelock_payload linelock; /**< Sets the throttled L2 cache linelock parameters. Only one
* throttled linelock is permitted at this time. Additional
* un-throttled linelocks can be performed using linelock_nothrottle */
HAP_power_dcvs_payload dcvs; /**< Updates DCVS params */
HAP_power_dcvs_v2_payload dcvs_v2; /**< Updates DCVS_v2 params */
HAP_power_dcvs_v2_update_payload dcvs_v2_update; /**< Updates DCVS_v2_update params */
HAP_power_linelock_nothrottle_payload linelock_nothrottle; /**< Sets the un-throttled L2 cache linelock parameters */
HAP_power_dcvs_v3_payload dcvs_v3; /**< Updates DCVS_v3 params */
HAP_power_hmx_payload hmx; /**< Requests to turn on / off HMX */
};
} HAP_power_request_t;
/** @defgroup HAP_power_functions HAP POWER functions
* @{
*/
/**
* Method to set power values from the DSP
* @param[in] context - To identify the power client
* @param[in] request - Request params.
* @retval 0 on success, AEE_EMMPMREGISTER on MMPM client register request failure, -1 on unknown error
*/
int HAP_power_set(void* context, HAP_power_request_t* request);
/**
* @} // HAP_power_functions
*/
/** @defgroup HAP_power_enums HAP POWER enums
* @{
*/
/** Identifies the HAP power response type */
typedef enum {
HAP_power_get_max_mips = 1, /**< Returns the max mips supported (max_mips) */
HAP_power_get_max_bus_bw, /**< Returns the max bus bandwidth supported (max_bus_bw) */
HAP_power_get_client_class, /**< Returns the client class (client_class) */
HAP_power_get_clk_Freq, /**< Returns the core clock frequency (clkFreqHz) */
HAP_power_get_aggregateAVSMpps, /**< Returns the aggregate Mpps used by audio and voice (clkFreqHz) */
HAP_power_get_dcvsEnabled, /**< Returns the dcvs status (enabled / disabled) */
HAP_power_get_vapss_core_clk_Freq, /**< Returns the VAPSS core clock frequency (clkFreqHz) */
HAP_power_get_dma_core_clk_Freq, /**< Returns the DMA core clock frequency (clkFreqHz) */
HAP_power_get_hcp_core_clk_Freq, /**< Returns the HCP core clock frequency (clkFreqHz) */
HAP_power_get_streamer0_core_clk_Freq, /**< Returns the streamer 0 core clock frequency (clkFreqHz) */
HAP_power_get_streamer1_core_clk_Freq, /**< Returns the streamer 1 core clock frequency (clkFreqHz) */
} HAP_Power_response_type;
/**
* @} // HAP_power_enums
*/
/** Data type to retrieve power values from the DSP */
typedef struct {
HAP_Power_response_type type; /**< Identifies the type to retrieve. */
union{
unsigned int max_mips; /**< Max mips supported */
uint64 max_bus_bw; /**< Max bus bw supported */
unsigned int client_class; /**< Current client class */
unsigned int clkFreqHz; /**< Current core CPU frequency */
unsigned int aggregateAVSMpps; /**< Aggregate AVS Mpps used by audio and voice */
boolean dcvsEnabled; /**< Indicates if dcvs is enabled / disabled. */
};
} HAP_power_response_t;
/** @defgroup HAP_power_functions HAP POWER functions
* @{
*/
/**
* Method to retrieve power values from the DSP
* @param[in] context - Ignored
* @param[out] response - Response.
*/
int HAP_power_get(void* context, HAP_power_response_t* response);
/**
* Method to initialize dcvs v3 structure in request param. It enables
* flags and resets params for all fields in dcvs v3. So, this
* can also be used to remove applied dcvs v3 params and restore
* defaults.
* @param[in] request - Pointer to request params.
*/
/*static inline void HAP_power_set_dcvs_v3_init(HAP_power_request_t* request) {
memset(request, 0, sizeof(HAP_power_request_t) );
request->type = HAP_power_set_DCVS_v3;
request->dcvs_v3.set_dcvs_enable = TRUE;
request->dcvs_v3.dcvs_enable = TRUE;
request->dcvs_v3.dcvs_option = HAP_DCVS_V2_POWER_SAVER_MODE;
request->dcvs_v3.set_latency = TRUE;
request->dcvs_v3.latency = 65535;
request->dcvs_v3.set_core_params = TRUE;
request->dcvs_v3.set_bus_params = TRUE;
request->dcvs_v3.set_dcvs_v3_params = TRUE;
request->dcvs_v3.set_sleep_disable = TRUE;
return;
}*/
/**
* Method to enable/disable dcvs and set particular dcvs policy.
* @param[in] context - User context.
* @param[in] dcvs_enable - TRUE to enable dcvs, FALSE to disable dcvs.
* @param[in] dcvs_option - To set particular dcvs policy. In case of dcvs disable
* request, this param will be ignored.
* @returns - 0 on success
*/
/*static inline int HAP_power_set_dcvs_option(void* context, boolean dcvs_enable,
HAP_power_dcvs_v2_payload_option dcvs_option) {
HAP_power_request_t request;
memset(&request, 0, sizeof(HAP_power_request_t) );
request.type = HAP_power_set_DCVS_v3;
request.dcvs_v3.set_dcvs_enable = TRUE;
request.dcvs_v3.dcvs_enable = dcvs_enable;
if(dcvs_enable)
request.dcvs_v3.dcvs_option = dcvs_option;
return HAP_power_set(context, &request);
}*/
/**
* Method to set/reset sleep latency.
* @param[in] context - User context.
* @param[in] latency - Sleep latency value in microseconds, should be > 1.
* Use 65535 max value to reset it to default.
* @returns - 0 on success
*/
/*static inline int HAP_power_set_sleep_latency(void* context, uint32 latency) {
HAP_power_request_t request;
memset(&request, 0, sizeof(HAP_power_request_t) );
request.type = HAP_power_set_DCVS_v3;
request.dcvs_v3.set_latency = TRUE;
request.dcvs_v3.latency = latency;
return HAP_power_set(context, &request);
}*/
/**
* Method to set/reset DSP core clock voltage corners.
* @param[in] context - User context.
* @param[in] target_corner - Target voltage corner.
* @param[in] min_corner - Minimum voltage corner.
* @param[in] max_corner - Maximum voltage corner.
* @returns - 0 on success
*/
/*static inline int HAP_power_set_core_corner(void* context, uint32 target_corner,
uint32 min_corner, uint32 max_corner) {
HAP_power_request_t request;
memset(&request, 0, sizeof(HAP_power_request_t) );
request.type = HAP_power_set_DCVS_v3;
request.dcvs_v3.set_core_params = TRUE;
request.dcvs_v3.core_params.min_corner = (HAP_dcvs_voltage_corner_t) (min_corner);
request.dcvs_v3.core_params.max_corner = (HAP_dcvs_voltage_corner_t) (max_corner);
request.dcvs_v3.core_params.target_corner = (HAP_dcvs_voltage_corner_t) (target_corner);
return HAP_power_set(context, &request);
}*/
/**
* Method to set/reset bus clock voltage corners.
* @param[in] context - User context.
* @param[in] target_corner - Target voltage corner.
* @param[in] min_corner - Minimum voltage corner.
* @param[in] max_corner - Maximum voltage corner.
* @returns - 0 on success
*/
/*static inline int HAP_power_set_bus_corner(void* context, uint32 target_corner,
uint32 min_corner, uint32 max_corner) {
HAP_power_request_t request;
memset(&request, 0, sizeof(HAP_power_request_t) );
request.type = HAP_power_set_DCVS_v3;
request.dcvs_v3.set_bus_params = TRUE;
request.dcvs_v3.bus_params.min_corner = (HAP_dcvs_voltage_corner_t) (min_corner);
request.dcvs_v3.bus_params.max_corner = (HAP_dcvs_voltage_corner_t) (max_corner);
request.dcvs_v3.bus_params.target_corner = (HAP_dcvs_voltage_corner_t) (target_corner);
return HAP_power_set(context, &request);
}*/
/**
* Method to disable/enable all low power modes.
* @param[in] context - User context.
* @param[in] sleep_disable - TRUE to disable all low power modes.
* FALSE to re-enable all low power modes.
* @returns - 0 on success
*/
/*static inline int HAP_power_set_sleep_mode(void* context, boolean sleep_disable) {
HAP_power_request_t request;
memset(&request, 0, sizeof(HAP_power_request_t) );
request.type = HAP_power_set_DCVS_v3;
request.dcvs_v3.set_sleep_disable = TRUE;
request.dcvs_v3.sleep_disable = sleep_disable;
return HAP_power_set(context, &request);
}*/
/**
* This API is deprecated and might generate undesired results.
* Please use the HAP_power_get() and HAP_power_set() APIs instead.
* Requests a performance level by percentage for clock speed
* and bus speed. Passing 0 for any parameter results in no
* request being issued for that particular attribute.
* @param[in] clock - percentage of target's maximum clock speed
* @param[in] bus - percentage of target's maximum bus speed
* @param[in] latency - maximum hardware wake up latency in microseconds. The
* higher the value the deeper state of sleep
* that can be entered but the longer it may
* take to awaken.
* @retval 0 on success
* @par Comments : Performance metrics vary from target to target so the
* intent of this API is to allow callers to set a relative
* performance level to achieve the desired balance between
* performance and power saving.
*/
int HAP_power_request(int clock, int bus, int latency);
/**
* This API is deprecated and might generate undesired results.
* Please use the HAP_power_get() and HAP_power_set() APIs instead.
* Requests a performance level by absolute values. Passing 0
* for any parameter results in no request being issued for that
* particular attribute.
* @param[in] clock - speed in MHz
* @param[in] bus - bus speed in MHz
* @param[in] latency - maximum hardware wakeup latency in microseconds. The
* higher the value the deeper state of
* sleep that can be entered but the
* longer it may take to awaken.
* @retval 0 on success
* @par Comments : This API allows callers who are aware of their target
* specific capabilities to set them explicitly.
*/
int HAP_power_request_abs(int clock, int bus, int latency);
/**
* This API is deprecated and might generate undesired results.
* Please use the HAP_power_get() and HAP_power_set() APIs instead.
* queries the target for its clock and bus speed capabilities
* @param[out] clock_max - maximum clock speed supported in MHz
* @param[out] bus_max - maximum bus speed supported in MHz
* @retval 0 on success
*/
int HAP_power_get_max_speed(int* clock_max, int* bus_max);
/**
* This API is deprecated and might generate undesired results.
* Please use the HAP_power_get() and HAP_power_set() APIs instead.
* Upvote for HVX power
* @retval 0 on success
*/
int HVX_power_request(void);
/**
* This API is deprecated and might generate undesired results.
* Please use the HAP_power_get() and HAP_power_set() APIs instead.
* Downvote for HVX power
* @retval 0 on success
*/
int HVX_power_release(void);
/**
* Method to destroy clients created through HAP_power_set
* @param[in] context - To uniquely identify the client
* @retval 0 on success, AEE_ENOSUCHCLIENT on Invalid context, -1 on unknown error
* @brief DO NOT call this API directly, use HAP_power_destroy instead.
*/
int HAP_power_destroy_client(void *context);
/**
* @param[in] client - To uniquely identify the client context.
* @retval 0 on success, AEE_EUNSUPPORTEDAPI if the API is not supported on the DSP image, AEE_ENOSUCHCLIENT on Invalid context, -1 on unknown error
* @brief Method to destroy clients created through HAP_power_set, wrapper to HAP_power_destroy_client API
*/
static inline int HAP_power_destroy(void *client){
if(0 != HAP_power_destroy_client)
return HAP_power_destroy_client(client);
return AEE_EUNSUPPORTEDAPI;
}
/**
* Method to create user client context
* @retval context for client
*/
//static inline void* HAP_utils_create_context(void) {
/*
* Allocate 1 byte of memory for a unique context identifier
* Clients can also allocate memory and use it as unique context identifier
*/
// return malloc(1);
//}
/**
* Method to destroy user client context
* @param context of client
*/
/*static inline void HAP_utils_destroy_context(void* context) {
free(context);
}*/
/**
* @} // HAP_power_functions
*/
#ifdef __cplusplus
}
#endif
#endif //_HAP_POWER_H

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/*
* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef ADSPRPC_SHARED_H
#define ADSPRPC_SHARED_H
#include <stdint.h>
#include <stddef.h>
#include <sys/types.h>
#include <linux/types.h>
#define FASTRPC_IOCTL_INVOKE _IOWR('R', 1, struct fastrpc_ioctl_invoke)
#define FASTRPC_IOCTL_MMAP _IOWR('R', 2, struct fastrpc_ioctl_mmap)
#define FASTRPC_IOCTL_MUNMAP _IOWR('R', 3, struct fastrpc_ioctl_munmap)
#define FASTRPC_IOCTL_MMAP_64 _IOWR('R', 14, struct fastrpc_ioctl_mmap_64)
#define FASTRPC_IOCTL_MUNMAP_64 _IOWR('R', 15, struct fastrpc_ioctl_munmap_64)
#define FASTRPC_IOCTL_INVOKE_FD _IOWR('R', 4, struct fastrpc_ioctl_invoke_fd)
#define FASTRPC_IOCTL_SETMODE _IOWR('R', 5, uint32_t)
#define FASTRPC_IOCTL_INIT _IOWR('R', 6, struct fastrpc_ioctl_init)
#define FASTRPC_IOCTL_INVOKE_ATTRS \
_IOWR('R', 7, struct fastrpc_ioctl_invoke_attrs)
#define FASTRPC_IOCTL_GETINFO _IOWR('R', 8, uint32_t)
#define FASTRPC_IOCTL_GETPERF _IOWR('R', 9, struct fastrpc_ioctl_perf)
#define FASTRPC_IOCTL_INIT_ATTRS _IOWR('R', 10, struct fastrpc_ioctl_init_attrs)
#define FASTRPC_IOCTL_INVOKE_CRC _IOWR('R', 11, struct fastrpc_ioctl_invoke_crc)
#define FASTRPC_IOCTL_CONTROL _IOWR('R', 12, struct fastrpc_ioctl_control)
#define FASTRPC_IOCTL_MUNMAP_FD _IOWR('R', 13, struct fastrpc_ioctl_munmap_fd)
#define FASTRPC_GLINK_GUID "fastrpcglink-apps-dsp"
#define FASTRPC_SMD_GUID "fastrpcsmd-apps-dsp"
#define DEVICE_NAME "adsprpc-smd"
/* Set for buffers that have no virtual mapping in userspace */
#define FASTRPC_ATTR_NOVA 0x1
/* Set for buffers that are NOT dma coherent */
#define FASTRPC_ATTR_NON_COHERENT 0x2
/* Set for buffers that are dma coherent */
#define FASTRPC_ATTR_COHERENT 0x4
/* Fastrpc attribute for keeping the map persistent */
#define FASTRPC_ATTR_KEEP_MAP 0x8
/* Fastrpc attribute for no map */
#define FASTRPC_ATTR_NOMAP (16)
/* Driver should operate in parallel with the co-processor */
#define FASTRPC_MODE_PARALLEL 0
/* Driver should operate in serial mode with the co-processor */
#define FASTRPC_MODE_SERIAL 1
/* Driver should operate in profile mode with the co-processor */
#define FASTRPC_MODE_PROFILE 2
/* Set FastRPC session ID to 1 */
#define FASTRPC_MODE_SESSION 4
/* INIT a new process or attach to guestos */
#define FASTRPC_INIT_ATTACH 0
#define FASTRPC_INIT_CREATE 1
#define FASTRPC_INIT_CREATE_STATIC 2
#define FASTRPC_INIT_ATTACH_SENSORS 3
/* Retrives number of input buffers from the scalars parameter */
#define REMOTE_SCALARS_INBUFS(sc) (((sc) >> 16) & 0x0ff)
/* Retrives number of output buffers from the scalars parameter */
#define REMOTE_SCALARS_OUTBUFS(sc) (((sc) >> 8) & 0x0ff)
/* Retrives number of input handles from the scalars parameter */
#define REMOTE_SCALARS_INHANDLES(sc) (((sc) >> 4) & 0x0f)
/* Retrives number of output handles from the scalars parameter */
#define REMOTE_SCALARS_OUTHANDLES(sc) ((sc) & 0x0f)
#define REMOTE_SCALARS_LENGTH(sc) (REMOTE_SCALARS_INBUFS(sc) +\
REMOTE_SCALARS_OUTBUFS(sc) +\
REMOTE_SCALARS_INHANDLES(sc) +\
REMOTE_SCALARS_OUTHANDLES(sc))
#define REMOTE_SCALARS_MAKEX(attr, method, in, out, oin, oout) \
((((uint32_t) (attr) & 0x7) << 29) | \
(((uint32_t) (method) & 0x1f) << 24) | \
(((uint32_t) (in) & 0xff) << 16) | \
(((uint32_t) (out) & 0xff) << 8) | \
(((uint32_t) (oin) & 0x0f) << 4) | \
((uint32_t) (oout) & 0x0f))
#define REMOTE_SCALARS_MAKE(method, in, out) \
REMOTE_SCALARS_MAKEX(0, method, in, out, 0, 0)
#ifndef VERIFY_PRINT_ERROR
#define VERIFY_EPRINTF(format, args) (void)0
#endif
#ifndef VERIFY_PRINT_INFO
#define VERIFY_IPRINTF(args) (void)0
#endif
#ifndef VERIFY
#define __STR__(x) #x ":"
#define __TOSTR__(x) __STR__(x)
#define __FILE_LINE__ __FILE__ ":" __TOSTR__(__LINE__)
#define VERIFY(err, val) \
do {\
VERIFY_IPRINTF(__FILE_LINE__"info: calling: " #val "\n");\
if ((val) == 0) {\
(err) = (err) == 0 ? -1 : (err);\
VERIFY_EPRINTF(__FILE_LINE__"error: %d: " #val "\n", (err));\
} else {\
VERIFY_IPRINTF(__FILE_LINE__"info: passed: " #val "\n");\
} \
} while (0)
#endif
#define remote_arg64_t union remote_arg64
struct remote_buf64 {
uint64_t pv;
uint64_t len;
};
struct remote_dma_handle64 {
int fd;
uint32_t offset;
uint32_t len;
};
union remote_arg64 {
struct remote_buf64 buf;
struct remote_dma_handle64 dma;
uint32_t h;
};
#define remote_arg_t union remote_arg
struct remote_buf {
void *pv; /* buffer pointer */
size_t len; /* length of buffer */
};
struct remote_dma_handle {
int fd;
uint32_t offset;
};
union remote_arg {
struct remote_buf buf; /* buffer info */
struct remote_dma_handle dma;
uint32_t h; /* remote handle */
};
struct fastrpc_ioctl_invoke {
uint32_t handle; /* remote handle */
uint32_t sc; /* scalars describing the data */
remote_arg_t *pra; /* remote arguments list */
};
struct fastrpc_ioctl_invoke_fd {
struct fastrpc_ioctl_invoke inv;
int *fds; /* fd list */
};
struct fastrpc_ioctl_invoke_attrs {
struct fastrpc_ioctl_invoke inv;
int *fds; /* fd list */
unsigned int *attrs; /* attribute list */
};
struct fastrpc_ioctl_invoke_crc {
struct fastrpc_ioctl_invoke inv;
int *fds; /* fd list */
unsigned int *attrs; /* attribute list */
unsigned int *crc;
};
struct fastrpc_ioctl_init {
uint32_t flags; /* one of FASTRPC_INIT_* macros */
uintptr_t file; /* pointer to elf file */
uint32_t filelen; /* elf file length */
int32_t filefd; /* ION fd for the file */
uintptr_t mem; /* mem for the PD */
uint32_t memlen; /* mem length */
int32_t memfd; /* ION fd for the mem */
};
struct fastrpc_ioctl_init_attrs {
struct fastrpc_ioctl_init init;
int attrs;
unsigned int siglen;
};
struct fastrpc_ioctl_munmap {
uintptr_t vaddrout; /* address to unmap */
size_t size; /* size */
};
struct fastrpc_ioctl_munmap_64 {
uint64_t vaddrout; /* address to unmap */
size_t size; /* size */
};
struct fastrpc_ioctl_mmap {
int fd; /* ion fd */
uint32_t flags; /* flags for dsp to map with */
uintptr_t vaddrin; /* optional virtual address */
size_t size; /* size */
uintptr_t vaddrout; /* dsps virtual address */
};
struct fastrpc_ioctl_mmap_64 {
int fd; /* ion fd */
uint32_t flags; /* flags for dsp to map with */
uint64_t vaddrin; /* optional virtual address */
size_t size; /* size */
uint64_t vaddrout; /* dsps virtual address */
};
struct fastrpc_ioctl_munmap_fd {
int fd; /* fd */
uint32_t flags; /* control flags */
uintptr_t va; /* va */
ssize_t len; /* length */
};
struct fastrpc_ioctl_perf { /* kernel performance data */
uintptr_t data;
uint32_t numkeys;
uintptr_t keys;
};
#define FASTRPC_CONTROL_LATENCY (1)
struct fastrpc_ctrl_latency {
uint32_t enable; /* latency control enable */
uint32_t level; /* level of control */
};
#define FASTRPC_CONTROL_SMMU (2)
struct fastrpc_ctrl_smmu {
uint32_t sharedcb;
};
#define FASTRPC_CONTROL_KALLOC (3)
struct fastrpc_ctrl_kalloc {
uint32_t kalloc_support; /* Remote memory allocation from kernel */
};
struct fastrpc_ioctl_control {
uint32_t req;
union {
struct fastrpc_ctrl_latency lp;
struct fastrpc_ctrl_smmu smmu;
struct fastrpc_ctrl_kalloc kalloc;
};
};
struct smq_null_invoke {
uint64_t ctx; /* invoke caller context */
uint32_t handle; /* handle to invoke */
uint32_t sc; /* scalars structure describing the data */
};
struct smq_phy_page {
uint64_t addr; /* physical address */
uint64_t size; /* size of contiguous region */
};
struct smq_invoke_buf {
int num; /* number of contiguous regions */
int pgidx; /* index to start of contiguous region */
};
struct smq_invoke {
struct smq_null_invoke header;
struct smq_phy_page page; /* remote arg and list of pages address */
};
struct smq_msg {
uint32_t pid; /* process group id */
uint32_t tid; /* thread id */
struct smq_invoke invoke;
};
struct smq_invoke_rsp {
uint64_t ctx; /* invoke caller context */
int retval; /* invoke return value */
};
static inline struct smq_invoke_buf *smq_invoke_buf_start(remote_arg64_t *pra,
uint32_t sc)
{
unsigned int len = REMOTE_SCALARS_LENGTH(sc);
return (struct smq_invoke_buf *)(&pra[len]);
}
static inline struct smq_phy_page *smq_phy_page_start(uint32_t sc,
struct smq_invoke_buf *buf)
{
unsigned int nTotal = REMOTE_SCALARS_LENGTH(sc);
return (struct smq_phy_page *)(&buf[nTotal]);
}
#endif

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@@ -0,0 +1,208 @@
/**
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _APPS_STD_H
#define _APPS_STD_H
#include "AEEStdDef.h"
#ifndef __QAIC_HEADER
#define __QAIC_HEADER(ff) ff
#endif //__QAIC_HEADER
#ifndef __QAIC_HEADER_EXPORT
#define __QAIC_HEADER_EXPORT
#endif // __QAIC_HEADER_EXPORT
#ifndef __QAIC_HEADER_ATTRIBUTE
#define __QAIC_HEADER_ATTRIBUTE
#endif // __QAIC_HEADER_ATTRIBUTE
#ifndef __QAIC_IMPL
#define __QAIC_IMPL(ff) ff
#endif //__QAIC_IMPL
#ifndef __QAIC_IMPL_EXPORT
#define __QAIC_IMPL_EXPORT
#endif // __QAIC_IMPL_EXPORT
#ifndef __QAIC_IMPL_ATTRIBUTE
#define __QAIC_IMPL_ATTRIBUTE
#endif // __QAIC_IMPL_ATTRIBUTE
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(__QAIC_STRING1_OBJECT_DEFINED__) && !defined(__STRING1_OBJECT__)
#define __QAIC_STRING1_OBJECT_DEFINED__
#define __STRING1_OBJECT__
typedef struct _cstring1_s {
char* data;
int dataLen;
} _cstring1_t;
#endif /* __QAIC_STRING1_OBJECT_DEFINED__ */
/**
* standard library functions remoted from the apps to the dsp
*/
typedef int apps_std_FILE;
enum apps_std_SEEK {
APPS_STD_SEEK_SET,
APPS_STD_SEEK_CUR,
APPS_STD_SEEK_END,
_32BIT_PLACEHOLDER_apps_std_SEEK = 0x7fffffff
};
typedef enum apps_std_SEEK apps_std_SEEK;
typedef struct apps_std_DIR apps_std_DIR;
struct apps_std_DIR {
uint64 handle;
};
typedef struct apps_std_DIRENT apps_std_DIRENT;
struct apps_std_DIRENT {
int ino;
char name[255];
};
typedef struct apps_std_STAT apps_std_STAT;
struct apps_std_STAT {
uint64 tsz;
uint64 dev;
uint64 ino;
uint32 mode;
uint32 nlink;
uint64 rdev;
uint64 size;
int64 atime;
int64 atimensec;
int64 mtime;
int64 mtimensec;
int64 ctime;
int64 ctimensec;
};
/**
* @retval, if operation fails errno is returned
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fopen)(const char* name, const char* mode, apps_std_FILE* psout) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_freopen)(apps_std_FILE sin, const char* name, const char* mode, apps_std_FILE* psout) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fflush)(apps_std_FILE sin) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fclose)(apps_std_FILE sin) __QAIC_HEADER_ATTRIBUTE;
/**
* @param, bEOF, if read or write bytes <= bufLen bytes then feof() is called
* and the result is returned in bEOF, otherwise bEOF is set to 0.
* @retval, if read or write return 0 for non zero length buffers, ferror is checked
* and a non zero value is returned in case of error with no rout parameters
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fread)(apps_std_FILE sin, byte* buf, int bufLen, int* bytesRead, int* bEOF) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fwrite)(apps_std_FILE sin, const byte* buf, int bufLen, int* bytesWritten, int* bEOF) __QAIC_HEADER_ATTRIBUTE;
/**
* @param, pos, this buffer is filled up to MIN(posLen, sizeof(fpos_t))
* @param, posLenReq, returns sizeof(fpos_t)
* @retval, if operation fails errno is returned
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fgetpos)(apps_std_FILE sin, byte* pos, int posLen, int* posLenReq) __QAIC_HEADER_ATTRIBUTE;
/**
* @param, if size of pos doesn't match the system size an error is returned.
* fgetpos can be used to query the size of fpos_t
* @retval, if operation fails errno is returned
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fsetpos)(apps_std_FILE sin, const byte* pos, int posLen) __QAIC_HEADER_ATTRIBUTE;
/**
* @retval, if operation fails errno is returned
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_ftell)(apps_std_FILE sin, int* pos) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fseek)(apps_std_FILE sin, int offset, apps_std_SEEK whence) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_flen)(apps_std_FILE sin, uint64* len) __QAIC_HEADER_ATTRIBUTE;
/**
* @retval, only fails if transport fails
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_rewind)(apps_std_FILE sin) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_feof)(apps_std_FILE sin, int* bEOF) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_ferror)(apps_std_FILE sin, int* err) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_clearerr)(apps_std_FILE sin) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_print_string)(const char* str) __QAIC_HEADER_ATTRIBUTE;
/**
* @param val, must contain space for NULL
* @param valLenReq, length required with NULL
* @retval, if fails errno is returned
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_getenv)(const char* name, char* val, int valLen, int* valLenReq) __QAIC_HEADER_ATTRIBUTE;
/**
* @retval, if fails errno is returned
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_setenv)(const char* name, const char* val, int override) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_unsetenv)(const char* name) __QAIC_HEADER_ATTRIBUTE;
/**
* This function will try to open a file given directories in envvarname separated by
* delim.
* so given environment variable FOO_PATH=/foo;/bar
* fopen_wth_env("FOO_PATH", ";", "path/to/file", "rw", &out);
* will try to open /foo/path/to/file, /bar/path/to/file
* if the variable is unset, it will open the file directly
*
* @param envvarname, name of the environment variable containing the path
* @param delim, delimiator string, such as ";"
* @param name, name of the file
* @param mode, mode
* @param psout, output handle
* @retval, 0 on success errno or -1 on failure
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fopen_with_env)(const char* envvarname, const char* delim, const char* name, const char* mode, apps_std_FILE* psout) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fgets)(apps_std_FILE sin, byte* buf, int bufLen, int* bEOF) __QAIC_HEADER_ATTRIBUTE;
/**
* This method will return the paths that are searched when looking for a file.
* The paths are defined by the environment variable (separated by delimiters)
* that is passed to the method.
*
* @param envvarname, name of the environment variable containing the path
* @param delim, delimiator string, such as ";"
* @param name, name of the file
* @param paths, Search paths
* @param numPaths, Actual number of paths found
* @param maxPathLen, The max path length
* @retval, 0 on success errno or -1 on failure
*
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_get_search_paths_with_env)(const char* envvarname, const char* delim, _cstring1_t* paths, int pathsLen, uint32* numPaths, uint16* maxPathLen) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fileExists)(const char* path, boolean* exists) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fsync)(apps_std_FILE sin) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fremove)(const char* name) __QAIC_HEADER_ATTRIBUTE;
/**
* This function decrypts the file using the provided open file descriptor, closes the
* original descriptor and return a new file descriptor.
* @retval, if operation fails errno is returned
*/
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_fdopen_decrypt)(apps_std_FILE sin, apps_std_FILE* psout) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_opendir)(const char* name, apps_std_DIR* dir) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_closedir)(const apps_std_DIR* dir) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_readdir)(const apps_std_DIR* dir, apps_std_DIRENT* dirent, int* bEOF) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_mkdir)(const char* name, int mode) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_rmdir)(const char* name) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_stat)(const char* name, apps_std_STAT* stat) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_ftrunc)(apps_std_FILE sin, int offset) __QAIC_HEADER_ATTRIBUTE;
__QAIC_HEADER_EXPORT int __QAIC_HEADER(apps_std_frename)(const char* oldname, const char* newname) __QAIC_HEADER_ATTRIBUTE;
#ifdef __cplusplus
}
#endif
#endif //_APPS_STD_H

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@@ -0,0 +1,204 @@
/*
* drivers/staging/android/uapi/ion.h
*
* Copyright (C) 2011 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef _UAPI_LINUX_ION_H
#define _UAPI_LINUX_ION_H
#include <stddef.h>
#include <linux/ioctl.h>
#include <linux/types.h>
typedef int ion_user_handle_t;
/**
* enum ion_heap_types - list of all possible types of heaps
* @ION_HEAP_TYPE_SYSTEM: memory allocated via vmalloc
* @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc
* @ION_HEAP_TYPE_CARVEOUT: memory allocated from a prereserved
* carveout heap, allocations are physically
* contiguous
* @ION_HEAP_TYPE_DMA: memory allocated via DMA API
* @ION_NUM_HEAPS: helper for iterating over heaps, a bit mask
* is used to identify the heaps, so only 32
* total heap types are supported
*/
enum ion_heap_type {
ION_HEAP_TYPE_SYSTEM,
ION_HEAP_TYPE_SYSTEM_CONTIG,
ION_HEAP_TYPE_CARVEOUT,
ION_HEAP_TYPE_CHUNK,
ION_HEAP_TYPE_DMA,
ION_HEAP_TYPE_CUSTOM, /*
* must be last so device specific heaps always
* are at the end of this enum
*/
ION_NUM_HEAPS = 16,
};
#define ION_HEAP_SYSTEM_MASK ((1 << ION_HEAP_TYPE_SYSTEM))
#define ION_HEAP_SYSTEM_CONTIG_MASK ((1 << ION_HEAP_TYPE_SYSTEM_CONTIG))
#define ION_HEAP_CARVEOUT_MASK ((1 << ION_HEAP_TYPE_CARVEOUT))
#define ION_HEAP_TYPE_DMA_MASK ((1 << ION_HEAP_TYPE_DMA))
#define ION_NUM_HEAP_IDS (sizeof(unsigned int) * 8)
/**
* allocation flags - the lower 16 bits are used by core ion, the upper 16
* bits are reserved for use by the heaps themselves.
*/
#define ION_FLAG_CACHED 1 /*
* mappings of this buffer should be
* cached, ion will do cache
* maintenance when the buffer is
* mapped for dma
*/
#define ION_FLAG_CACHED_NEEDS_SYNC 2 /*
* mappings of this buffer will created
* at mmap time, if this is set
* caches must be managed
* manually
*/
/**
* DOC: Ion Userspace API
*
* create a client by opening /dev/ion
* most operations handled via following ioctls
*
*/
/**
* struct ion_allocation_data - metadata passed from userspace for allocations
* @len: size of the allocation
* @align: required alignment of the allocation
* @heap_id_mask: mask of heap ids to allocate from
* @flags: flags passed to heap
* @handle: pointer that will be populated with a cookie to use to
* refer to this allocation
*
* Provided by userspace as an argument to the ioctl
*/
struct ion_allocation_data {
size_t len;
size_t align;
unsigned int heap_id_mask;
unsigned int flags;
ion_user_handle_t handle;
};
/**
* struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair
* @handle: a handle
* @fd: a file descriptor representing that handle
*
* For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with
* the handle returned from ion alloc, and the kernel returns the file
* descriptor to share or map in the fd field. For ION_IOC_IMPORT, userspace
* provides the file descriptor and the kernel returns the handle.
*/
struct ion_fd_data {
ion_user_handle_t handle;
int fd;
};
/**
* struct ion_handle_data - a handle passed to/from the kernel
* @handle: a handle
*/
struct ion_handle_data {
ion_user_handle_t handle;
};
/**
* struct ion_custom_data - metadata passed to/from userspace for a custom ioctl
* @cmd: the custom ioctl function to call
* @arg: additional data to pass to the custom ioctl, typically a user
* pointer to a predefined structure
*
* This works just like the regular cmd and arg fields of an ioctl.
*/
struct ion_custom_data {
unsigned int cmd;
unsigned long arg;
};
#define ION_IOC_MAGIC 'I'
/**
* DOC: ION_IOC_ALLOC - allocate memory
*
* Takes an ion_allocation_data struct and returns it with the handle field
* populated with the opaque handle for the allocation.
*/
#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, \
struct ion_allocation_data)
/**
* DOC: ION_IOC_FREE - free memory
*
* Takes an ion_handle_data struct and frees the handle.
*/
#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
/**
* DOC: ION_IOC_MAP - get a file descriptor to mmap
*
* Takes an ion_fd_data struct with the handle field populated with a valid
* opaque handle. Returns the struct with the fd field set to a file
* descriptor open in the current address space. This file descriptor
* can then be used as an argument to mmap.
*/
#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data)
/**
* DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation
*
* Takes an ion_fd_data struct with the handle field populated with a valid
* opaque handle. Returns the struct with the fd field set to a file
* descriptor open in the current address space. This file descriptor
* can then be passed to another process. The corresponding opaque handle can
* be retrieved via ION_IOC_IMPORT.
*/
#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
/**
* DOC: ION_IOC_IMPORT - imports a shared file descriptor
*
* Takes an ion_fd_data struct with the fd field populated with a valid file
* descriptor obtained from ION_IOC_SHARE and returns the struct with the handle
* filed set to the corresponding opaque handle.
*/
#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data)
/**
* DOC: ION_IOC_SYNC - syncs a shared file descriptors to memory
*
* Deprecated in favor of using the dma_buf api's correctly (syncing
* will happen automatically when the buffer is mapped to a device).
* If necessary should be used after touching a cached buffer from the cpu,
* this will make the buffer in memory coherent.
*/
#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data)
/**
* DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl
*
* Takes the argument of the architecture specific ioctl to call and
* passes appropriate userdata for that ioctl
*/
#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
#endif /* _UAPI_LINUX_ION_H */

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@@ -0,0 +1,211 @@
#ifndef _UAPI_MSM_ION_H
#define _UAPI_MSM_ION_H
#include "ion.h"
enum msm_ion_heap_types {
ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
ION_HEAP_TYPE_SECURE_DMA = ION_HEAP_TYPE_MSM_START,
ION_HEAP_TYPE_SYSTEM_SECURE,
ION_HEAP_TYPE_HYP_CMA,
/*
* if you add a heap type here you should also add it to
* heap_types_info[] in msm_ion.c
*/
};
/**
* These are the only ids that should be used for Ion heap ids.
* The ids listed are the order in which allocation will be attempted
* if specified. Don't swap the order of heap ids unless you know what
* you are doing!
* Id's are spaced by purpose to allow new Id's to be inserted in-between (for
* possible fallbacks)
*/
enum ion_heap_ids {
INVALID_HEAP_ID = -1,
ION_CP_MM_HEAP_ID = 8,
ION_SECURE_HEAP_ID = 9,
ION_SECURE_DISPLAY_HEAP_ID = 10,
ION_CP_MFC_HEAP_ID = 12,
ION_CP_WB_HEAP_ID = 16, /* 8660 only */
ION_CAMERA_HEAP_ID = 20, /* 8660 only */
ION_SYSTEM_CONTIG_HEAP_ID = 21,
ION_ADSP_HEAP_ID = 22,
ION_PIL1_HEAP_ID = 23, /* Currently used for other PIL images */
ION_SF_HEAP_ID = 24,
ION_SYSTEM_HEAP_ID = 25,
ION_PIL2_HEAP_ID = 26, /* Currently used for modem firmware images */
ION_QSECOM_HEAP_ID = 27,
ION_AUDIO_HEAP_ID = 28,
ION_MM_FIRMWARE_HEAP_ID = 29,
ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_FLAG_SECURE flag */
};
/*
* The IOMMU heap is deprecated! Here are some aliases for backwards
* compatibility:
*/
#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID
#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM
enum ion_fixed_position {
NOT_FIXED,
FIXED_LOW,
FIXED_MIDDLE,
FIXED_HIGH,
};
enum cp_mem_usage {
VIDEO_BITSTREAM = 0x1,
VIDEO_PIXEL = 0x2,
VIDEO_NONPIXEL = 0x3,
DISPLAY_SECURE_CP_USAGE = 0x4,
CAMERA_SECURE_CP_USAGE = 0x5,
MAX_USAGE = 0x6,
UNKNOWN = 0x7FFFFFFF,
};
/**
* Flags to be used when allocating from the secure heap for
* content protection
*/
#define ION_FLAG_CP_TOUCH (1 << 17)
#define ION_FLAG_CP_BITSTREAM (1 << 18)
#define ION_FLAG_CP_PIXEL (1 << 19)
#define ION_FLAG_CP_NON_PIXEL (1 << 20)
#define ION_FLAG_CP_CAMERA (1 << 21)
#define ION_FLAG_CP_HLOS (1 << 22)
#define ION_FLAG_CP_HLOS_FREE (1 << 23)
#define ION_FLAG_CP_SEC_DISPLAY (1 << 25)
#define ION_FLAG_CP_APP (1 << 26)
/**
* Flag to allow non continguous allocation of memory from secure
* heap
*/
#define ION_FLAG_ALLOW_NON_CONTIG (1 << 24)
/**
* Flag to use when allocating to indicate that a heap is secure.
*/
#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
/**
* Flag for clients to force contiguous memort allocation
*
* Use of this flag is carefully monitored!
*/
#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
/*
* Used in conjunction with heap which pool memory to force an allocation
* to come from the page allocator directly instead of from the pool allocation
*/
#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
#define ION_FLAG_POOL_PREFETCH (1 << 27)
/**
* Deprecated! Please use the corresponding ION_FLAG_*
*/
#define ION_SECURE ION_FLAG_SECURE
#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS
/**
* Macro should be used with ion_heap_ids defined above.
*/
#define ION_HEAP(bit) (1 << (bit))
#define ION_ADSP_HEAP_NAME "adsp"
#define ION_SYSTEM_HEAP_NAME "system"
#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME
#define ION_KMALLOC_HEAP_NAME "kmalloc"
#define ION_AUDIO_HEAP_NAME "audio"
#define ION_SF_HEAP_NAME "sf"
#define ION_MM_HEAP_NAME "mm"
#define ION_CAMERA_HEAP_NAME "camera_preview"
#define ION_IOMMU_HEAP_NAME "iommu"
#define ION_MFC_HEAP_NAME "mfc"
#define ION_WB_HEAP_NAME "wb"
#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
#define ION_PIL1_HEAP_NAME "pil_1"
#define ION_PIL2_HEAP_NAME "pil_2"
#define ION_QSECOM_HEAP_NAME "qsecom"
#define ION_SECURE_HEAP_NAME "secure_heap"
#define ION_SECURE_DISPLAY_HEAP_NAME "secure_display"
#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED)
#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED)
#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED)
/* struct ion_flush_data - data passed to ion for flushing caches
*
* @handle: handle with data to flush
* @fd: fd to flush
* @vaddr: userspace virtual address mapped with mmap
* @offset: offset into the handle to flush
* @length: length of handle to flush
*
* Performs cache operations on the handle. If p is the start address
* of the handle, p + offset through p + offset + length will have
* the cache operations performed
*/
struct ion_flush_data {
ion_user_handle_t handle;
int fd;
void *vaddr;
unsigned int offset;
unsigned int length;
};
struct ion_prefetch_regions {
unsigned int vmid;
size_t *sizes;
unsigned int nr_sizes;
};
struct ion_prefetch_data {
int heap_id;
unsigned long len;
/* Is unsigned long bad? 32bit compiler vs 64 bit compiler*/
struct ion_prefetch_regions *regions;
unsigned int nr_regions;
};
#define ION_IOC_MSM_MAGIC 'M'
/**
* DOC: ION_IOC_CLEAN_CACHES - clean the caches
*
* Clean the caches of the handle specified.
*/
#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, \
struct ion_flush_data)
/**
* DOC: ION_IOC_INV_CACHES - invalidate the caches
*
* Invalidate the caches of the handle specified.
*/
#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, \
struct ion_flush_data)
/**
* DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches
*
* Clean and invalidate the caches of the handle specified.
*/
#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, \
struct ion_flush_data)
#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, \
struct ion_prefetch_data)
#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, \
struct ion_prefetch_data)
#endif

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