IQ.Pilot Release Commit @ 0798119
This commit is contained in:
IQ.Lvbs history cleanup
0
tinygrad_repo/test/device/__init__.py
Normal file
0
tinygrad_repo/test/device/__init__.py
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42
tinygrad_repo/test/device/test_amd_llvm.py
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42
tinygrad_repo/test/device/test_amd_llvm.py
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@@ -0,0 +1,42 @@
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import unittest
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from tinygrad import Device
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from tinygrad.device import CompileError
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if Device.DEFAULT == "AMD":
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# NOTE: if you don't gate this, LVP fails on Mac
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from tinygrad.runtime.support.compiler_amd import AMDLLVMCompiler
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@unittest.skipUnless(Device.DEFAULT == "AMD", "Runs only on AMD")
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class TestAMDLLVM(unittest.TestCase):
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def test_compiler(self):
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src = '''
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; https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/AMDGPU/imm.ll
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define amdgpu_kernel void @i64_imm_inline_lo(ptr addrspace(1) %out) {
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entry:
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store i64 1311768464867721221, ptr addrspace(1) %out ; 0x1234567800000005
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ret void
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}
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'''
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compiler = AMDLLVMCompiler("gfx1100")
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compiler.compile(src)
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def test_compiler_diag_error(self):
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src = """
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@local_temp0 = internal unnamed_addr addrspace(3) global [{N} x float*] undef, align 16
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define amdgpu_kernel void @test(float* noalias align 32 %data0, half* noalias align 32 %data1, float* noalias align 32 %data2) #0
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{{
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%local_temp0 = addrspacecast [{N} x float*] addrspace(3)* @local_temp0 to [{N} x float*]*
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%v178 = getelementptr inbounds float, float* %local_temp0, i32 1
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%v133 = getelementptr inbounds float, float* %data2, i32 1
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%v134 = load float, float* %v133
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store float %v134, float* %v178
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ret void
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}}
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"""
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compiler = AMDLLVMCompiler("gfx1100")
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compiler.compile(src.format(N=65536//8))
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with self.assertRaises(CompileError):
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# llvm diagnostic: <unknown>:0:0: local memory (65544) exceeds limit (65536) in function 'test'
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compiler.compile(src.format(N=65536//8+1))
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if __name__ == '__main__':
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unittest.main()
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653
tinygrad_repo/test/device/test_hcq.py
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653
tinygrad_repo/test/device/test_hcq.py
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@@ -0,0 +1,653 @@
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import unittest, ctypes, struct, os, random, numpy as np, time
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from tinygrad import Device, Tensor, dtypes
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from tinygrad.helpers import mv_address, DEBUG, DEV
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from test.helpers import slow, replace_opts
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from tinygrad.device import Buffer, BufferSpec
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from tinygrad.runtime.support.hcq import HCQCompiled, HCQBuffer
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from tinygrad.runtime.autogen import libc
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from tinygrad.runtime.support.system import PCIIfaceBase
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from tinygrad.engine.realize import get_runtime
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from tinygrad.codegen import to_program
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from tinygrad.codegen.opt import Opt, OptOps
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from tinygrad import Variable
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MOCKGPU = DEV.interface.startswith("MOCK")
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@unittest.skipUnless(issubclass(type(Device[Device.DEFAULT]), HCQCompiled), "HCQ device required to run")
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class TestHCQ(unittest.TestCase):
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@classmethod
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def setUpClass(self):
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TestHCQ.d0 = Device[Device.DEFAULT]
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TestHCQ.a = Tensor([0.,1.], device=Device.DEFAULT).realize()
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TestHCQ.b = self.a + 1
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si = self.b.schedule_linear().src[-1]
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TestHCQ.prg = to_program(si.src[0], TestHCQ.d0.renderer)
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TestHCQ.runtime = get_runtime(TestHCQ.d0.device, TestHCQ.prg)
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TestHCQ.b.uop.buffer.allocate()
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TestHCQ.kernargs_ba_ptr = TestHCQ.runtime.fill_kernargs([TestHCQ.b.uop.buffer._buf, TestHCQ.a.uop.buffer._buf])
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TestHCQ.kernargs_ab_ptr = TestHCQ.runtime.fill_kernargs([TestHCQ.a.uop.buffer._buf, TestHCQ.b.uop.buffer._buf])
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def setUp(self):
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TestHCQ.d0.synchronize()
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TestHCQ.a.uop.buffer.copyin(memoryview(bytearray(struct.pack("ff", 0, 1))))
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TestHCQ.b.uop.buffer.copyin(memoryview(bytearray(struct.pack("ff", 0, 0))))
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TestHCQ.d0.synchronize() # wait for copyins to complete
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# Test signals
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def test_signal(self):
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for queue_type in [TestHCQ.d0.hw_compute_queue_t, TestHCQ.d0.hw_copy_queue_t]:
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if queue_type is None: continue
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with self.subTest(name=str(queue_type)):
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queue_type().signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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def test_signal_update(self):
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for queue_type in [TestHCQ.d0.hw_compute_queue_t, TestHCQ.d0.hw_copy_queue_t]:
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if queue_type is None: continue
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virt_val = Variable("sig_val", 0, 0xffffffff, dtypes.uint32)
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virt_signal = TestHCQ.d0.signal_t(base_buf=HCQBuffer(Variable("sig_addr", 0, 0xffffffffffffffff, dtypes.uint64), 16))
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with self.subTest(name=str(queue_type)):
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q = queue_type().signal(virt_signal, virt_val)
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var_vals = {virt_signal.base_buf.va_addr.expr: TestHCQ.d0.timeline_signal.base_buf.va_addr, virt_val.expr: TestHCQ.d0.timeline_value}
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q.submit(TestHCQ.d0, var_vals)
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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var_vals = {virt_signal.base_buf.va_addr.expr: TestHCQ.d0.timeline_signal.base_buf.va_addr, virt_val.expr: TestHCQ.d0.timeline_value}
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q.submit(TestHCQ.d0, var_vals)
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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# Test wait
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def test_wait(self):
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for queue_type in [TestHCQ.d0.hw_compute_queue_t, TestHCQ.d0.hw_copy_queue_t]:
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if queue_type is None: continue
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with self.subTest(name=str(queue_type)):
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fake_signal = TestHCQ.d0.new_signal()
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fake_signal.value = 1
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queue_type().wait(fake_signal, 1) \
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.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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@unittest.skipIf(Device.DEFAULT == "CPU" or (DEV.interface == "MOCKPCI" and DEV.device == "AMD"), "Can't handle async update on CPU/MOCKPCI device")
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def test_wait_late_set(self):
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for queue_type in [TestHCQ.d0.hw_compute_queue_t, TestHCQ.d0.hw_copy_queue_t]:
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if queue_type is None: continue
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with self.subTest(name=str(queue_type)):
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fake_signal = TestHCQ.d0.new_signal()
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queue_type().wait(fake_signal, 1) \
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.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
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with self.assertRaises(RuntimeError):
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value, timeout=500)
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fake_signal.value = 1
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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def test_wait_update(self):
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for queue_type in [TestHCQ.d0.hw_compute_queue_t, TestHCQ.d0.hw_copy_queue_t]:
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if queue_type is None: continue
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with self.subTest(name=str(queue_type)):
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virt_val = Variable("sig_val", 0, 0xffffffff, dtypes.uint32)
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virt_signal = TestHCQ.d0.signal_t(base_buf=HCQBuffer(Variable("sig_addr", 0, 0xffffffffffffffff, dtypes.uint64), 16))
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fake_signal = TestHCQ.d0.new_signal()
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q = queue_type().wait(virt_signal, virt_val).signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value)
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fake_signal.value = 0x30
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q.submit(TestHCQ.d0, {virt_signal.base_buf.va_addr.expr: fake_signal.base_buf.va_addr, virt_val.expr: fake_signal.value})
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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# Test exec
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def test_exec_one_kernel(self):
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TestHCQ.d0.hw_compute_queue_t().exec(TestHCQ.runtime, TestHCQ.kernargs_ba_ptr, TestHCQ.prg.arg.global_size, TestHCQ.prg.arg.local_size) \
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.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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val = TestHCQ.b.uop.buffer.as_memoryview().cast("f")[0]
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assert val == 1.0, f"got val {val}"
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def test_exec_2_kernels_100_times(self):
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virt_val = Variable("sig_val", 0, 0xffffffff, dtypes.uint32)
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q = TestHCQ.d0.hw_compute_queue_t()
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q.wait(TestHCQ.d0.timeline_signal, virt_val - 1) \
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.exec(TestHCQ.runtime, TestHCQ.kernargs_ba_ptr, TestHCQ.prg.arg.global_size, TestHCQ.prg.arg.local_size) \
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.exec(TestHCQ.runtime, TestHCQ.kernargs_ab_ptr, TestHCQ.prg.arg.global_size, TestHCQ.prg.arg.local_size) \
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.signal(TestHCQ.d0.timeline_signal, virt_val)
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for _ in range(100):
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q.submit(TestHCQ.d0, {virt_val.expr: TestHCQ.d0.timeline_value})
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TestHCQ.d0.timeline_value += 1
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val = TestHCQ.a.uop.buffer.as_memoryview().cast("f")[0]
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assert val == 200.0, f"got val {val}"
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@unittest.skipIf(Device.DEFAULT in {"CPU"}, "No globals/locals on LLVM/CPU")
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def test_exec_update(self):
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sint_global = (Variable("sint_global", 0, 0xffffffff, dtypes.uint32),) + tuple(TestHCQ.prg.arg.global_size[1:])
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sint_local = (Variable("sint_local", 0, 0xffffffff, dtypes.uint32),) + tuple(TestHCQ.prg.arg.local_size[1:])
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q = TestHCQ.d0.hw_compute_queue_t()
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q.exec(TestHCQ.runtime, TestHCQ.kernargs_ba_ptr, sint_global, sint_local) \
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.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value)
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q.submit(TestHCQ.d0, {sint_global[0].expr: 1, sint_local[0].expr: 1})
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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val = TestHCQ.b.uop.buffer.as_memoryview().cast("f")[0]
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assert val == 1.0, f"got val {val}"
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val = TestHCQ.b.uop.buffer.as_memoryview().cast("f")[1]
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assert val == 0.0, f"got val {val}, should not be updated"
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@unittest.skipIf(Device.DEFAULT in {"CPU"}, "No globals/locals on LLVM/CPU")
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def test_exec_update_fuzz(self):
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virt_val = Variable("sig_val", 0, 0xffffffff, dtypes.uint32)
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virt_local = [Variable(f"local_{i}", 0, 0xffffffff, dtypes.uint32) for i in range(3)]
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a = Tensor.randint((3, 3, 3), dtype=dtypes.int, device=Device.DEFAULT).realize()
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b = a + 1
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si = b.schedule_linear().src[-1]
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prg = to_program(replace_opts(si.src[0], [Opt(op=OptOps.LOCAL, axis=0, arg=3) for _ in range(3)]), TestHCQ.d0.renderer)
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runtime = get_runtime(Device.DEFAULT, prg)
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zb = Buffer(Device.DEFAULT, 3 * 3 * 3, dtypes.int, options=BufferSpec(cpu_access=True, nolru=True)).ensure_allocated()
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zt = Buffer(Device.DEFAULT, 3 * 3 * 3, dtypes.int, options=BufferSpec(cpu_access=True, nolru=True)).ensure_allocated()
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ctypes.memset(zb._buf.va_addr, 0, zb.nbytes)
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kernargs = runtime.fill_kernargs([zt._buf, zb._buf])
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q = TestHCQ.d0.hw_compute_queue_t()
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q.memory_barrier() \
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.exec(runtime, kernargs, (1,1,1), virt_local) \
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.signal(TestHCQ.d0.timeline_signal, virt_val)
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for x in range(1, 4):
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for y in range(1, 4):
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for z in range(1, 4):
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ctypes.memset(zt._buf.va_addr, 0, zb.nbytes)
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q.submit(TestHCQ.d0, {virt_val.expr: TestHCQ.d0.timeline_value, virt_local[0].expr: x, virt_local[1].expr: y, virt_local[2].expr: z})
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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res_sum = sum(x for x in zt.as_memoryview().cast("I"))
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assert x * y * z == res_sum, f"want {x * y * z}, got {res_sum}"
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# Test copy
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def test_copy(self):
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if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
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TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
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.copy(TestHCQ.b.uop.buffer._buf, TestHCQ.a.uop.buffer._buf, 8) \
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.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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val = TestHCQ.b.uop.buffer.as_memoryview().cast("f")[1]
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assert val == 1.0, f"got val {val}"
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def test_copy_long(self):
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if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
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sz = 64 << 20
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buf1 = Buffer(Device.DEFAULT, sz, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
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buf2 = Buffer(Device.DEFAULT, sz, dtypes.int8, options=BufferSpec(host=True, nolru=True)).ensure_allocated()
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ctypes.memset(buf2._buf.va_addr, 1, sz)
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TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
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.copy(buf1._buf, buf2._buf, sz) \
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.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
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TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
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TestHCQ.d0.timeline_value += 1
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mv_buf1 = buf1.as_memoryview().cast('Q')
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assert libc.memcmp(mv_address(mv_buf1), buf2._buf.va_addr, sz) == 0
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@slow
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def test_copy_64bit(self):
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if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
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# NOTE: these must be a multiple of 8 for .view(fmt='Q') to work
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for sz in [(1 << 32) - 8, (1 << 32), (1 << 32) + 8, (5 << 30), (6 << 30) - 0x4642ee0]:
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buf1 = Buffer(Device.DEFAULT, sz, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
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buf2 = Buffer(Device.DEFAULT, sz, dtypes.int8, options=BufferSpec(host=True, nolru=True)).ensure_allocated()
|
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ctypes.memset(buf2._buf.va_addr, 0x3e, sz)
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buf2_q_view = buf2._buf.cpu_view().view(fmt='Q')
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for i in range(0, sz//8, 0x1000):
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for j in range(32): buf2_q_view[min(max(i + j - 16, 0), (sz // 8) - 1)] = random.randint(0, 0xffffffffffffffff)
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TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
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.copy(buf1._buf, buf2._buf, sz) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
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|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
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TestHCQ.d0.timeline_value += 1
|
||||
|
||||
mv_buf1 = buf1.as_memoryview()
|
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assert libc.memcmp(mv_address(mv_buf1), buf2._buf.va_addr, sz) == 0
|
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|
||||
def test_update_copy(self):
|
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if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
virt_src_addr = Variable("virt_src_addr", 0, 0xffffffffffffffff, dtypes.uint64)
|
||||
virt_dest_addr = Variable("virt_dest_addr", 0, 0xffffffffffffffff, dtypes.uint64)
|
||||
|
||||
q = TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
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.copy(HCQBuffer(virt_dest_addr, 8), HCQBuffer(virt_src_addr, 8), 8) \
|
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.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value)
|
||||
|
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q.submit(TestHCQ.d0, {virt_src_addr.expr: TestHCQ.a.uop.buffer._buf.va_addr, virt_dest_addr.expr: TestHCQ.b.uop.buffer._buf.va_addr})
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
val = TestHCQ.b.uop.buffer.as_memoryview().cast("f")[1]
|
||||
assert val == 1.0, f"got val {val}"
|
||||
|
||||
def test_update_copy_long(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
virt_src_addr = Variable("virt_src_addr", 0, 0xffffffffffffffff, dtypes.uint64)
|
||||
virt_dest_addr = Variable("virt_dest_addr", 0, 0xffffffffffffffff, dtypes.uint64)
|
||||
|
||||
sz = 64 << 20
|
||||
buf1 = Buffer(Device.DEFAULT, sz, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf2 = Buffer(Device.DEFAULT, sz, dtypes.int8, options=BufferSpec(host=True, nolru=True)).ensure_allocated()
|
||||
ctypes.memset(buf2._buf.va_addr, 1, sz)
|
||||
|
||||
q = TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.copy(HCQBuffer(virt_dest_addr, sz), HCQBuffer(virt_src_addr, sz), sz) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value)
|
||||
|
||||
q.submit(TestHCQ.d0, {virt_src_addr.expr: buf2._buf.va_addr, virt_dest_addr.expr: buf1._buf.va_addr})
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
mv_buf1 = buf1.as_memoryview().cast('Q')
|
||||
for i in range(sz//8): assert mv_buf1[i] == 0x0101010101010101, f"offset {i*8} differs, not all copied, got {hex(mv_buf1[i])}"
|
||||
|
||||
# Test bind api
|
||||
def test_bind(self):
|
||||
for queue_type in [TestHCQ.d0.hw_compute_queue_t, TestHCQ.d0.hw_copy_queue_t]:
|
||||
if queue_type is None: continue
|
||||
|
||||
virt_val = Variable("sig_val", 0, 0xffffffff, dtypes.uint32)
|
||||
virt_signal = TestHCQ.d0.signal_t(base_buf=HCQBuffer(Variable("sig_addr", 0, 0xffffffffffffffff, dtypes.uint64), 16))
|
||||
|
||||
with self.subTest(name=str(queue_type)):
|
||||
fake_signal = TestHCQ.d0.new_signal()
|
||||
q = queue_type().wait(virt_signal, virt_val).signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value)
|
||||
q.bind(TestHCQ.d0)
|
||||
|
||||
fake_signal.value = 0x30
|
||||
|
||||
q.submit(TestHCQ.d0, {virt_signal.base_buf.va_addr.expr: fake_signal.base_buf.va_addr, virt_val.expr: fake_signal.value})
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
# Test multidevice
|
||||
def test_multidevice_signal_wait(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
try: d1 = Device[f"{Device.DEFAULT}:1"]
|
||||
except Exception: self.skipTest("no multidevice, test skipped")
|
||||
|
||||
TestHCQ.d0.hw_copy_queue_t().signal(sig:=TestHCQ.d0.new_signal(value=0), value=0xfff) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
|
||||
d1.hw_copy_queue_t().wait(sig, value=0xfff) \
|
||||
.signal(d1.timeline_signal, d1.timeline_value).submit(d1)
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
d1.timeline_signal.wait(d1.timeline_value)
|
||||
d1.timeline_value += 1
|
||||
|
||||
# Test profile api
|
||||
def test_speed_exec_time(self):
|
||||
sig_st, sig_en = TestHCQ.d0.new_signal(), TestHCQ.d0.new_signal()
|
||||
TestHCQ.d0.hw_compute_queue_t().timestamp(sig_st) \
|
||||
.exec(TestHCQ.runtime, TestHCQ.kernargs_ba_ptr, TestHCQ.prg.arg.global_size, TestHCQ.prg.arg.local_size) \
|
||||
.timestamp(sig_en) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
et = float(sig_en.timestamp - sig_st.timestamp)
|
||||
|
||||
print(f"exec kernel time: {et:.2f} us")
|
||||
assert 0.1 <= et <= (3000000 if MOCKGPU or Device.DEFAULT in {"CPU"} else 100)
|
||||
|
||||
def test_speed_copy_bandwidth(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
# THEORY: the bandwidth is low here because it's only using one SDMA queue. I suspect it's more stable like this at least.
|
||||
SZ = 200_000_000
|
||||
a = Buffer(Device.DEFAULT, SZ, dtypes.uint8, options=BufferSpec(nolru=True)).allocate()
|
||||
b = Buffer(Device.DEFAULT, SZ, dtypes.uint8, options=BufferSpec(nolru=True)).allocate()
|
||||
|
||||
sig_st, sig_en = TestHCQ.d0.new_signal(), TestHCQ.d0.new_signal()
|
||||
TestHCQ.d0.hw_copy_queue_t().timestamp(sig_st) \
|
||||
.copy(a._buf, b._buf, SZ) \
|
||||
.timestamp(sig_en) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
et = float(sig_en.timestamp - sig_st.timestamp)
|
||||
et_ms = et / 1e3
|
||||
|
||||
gb_s = ((SZ / 1e9) / et_ms) * 1e3
|
||||
print(f"same device copy: {et_ms:.2f} ms, {gb_s:.2f} GB/s")
|
||||
assert (0.2 if MOCKGPU else 10) <= gb_s <= 1000
|
||||
|
||||
def test_speed_cross_device_copy_bandwidth(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
try: _ = Device[f"{Device.DEFAULT}:1"]
|
||||
except Exception: self.skipTest("no multidevice, test skipped")
|
||||
|
||||
SZ = 200_000_000
|
||||
b = Buffer(f"{Device.DEFAULT}:1", SZ, dtypes.uint8, options=BufferSpec(nolru=True)).allocate()
|
||||
a = Buffer(Device.DEFAULT, SZ, dtypes.uint8, options=BufferSpec(nolru=True)).allocate()
|
||||
TestHCQ.d0.allocator.map(b._buf)
|
||||
|
||||
sig_st, sig_en = TestHCQ.d0.new_signal(), TestHCQ.d0.new_signal()
|
||||
TestHCQ.d0.hw_copy_queue_t().timestamp(sig_st) \
|
||||
.copy(a._buf, b._buf, SZ) \
|
||||
.timestamp(sig_en) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
et = float(sig_en.timestamp - sig_st.timestamp)
|
||||
et_ms = et / 1e3
|
||||
|
||||
gb_s = ((SZ / 1e9) / et_ms) * 1e3
|
||||
print(f"cross device copy: {et_ms:.2f} ms, {gb_s:.2f} GB/s")
|
||||
assert (0.2 if MOCKGPU else 2) <= gb_s <= 100
|
||||
|
||||
def test_timeline_signal_rollover(self):
|
||||
for queue_type in [TestHCQ.d0.hw_compute_queue_t, TestHCQ.d0.hw_copy_queue_t]:
|
||||
if queue_type is None: continue
|
||||
|
||||
with self.subTest(name=str(queue_type)):
|
||||
TestHCQ.d0.timeline_value = (1 << 32) - 20 # close value to reset
|
||||
queue_type().signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value - 1)
|
||||
|
||||
for _ in range(40):
|
||||
queue_type().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
TestHCQ.d0.synchronize()
|
||||
|
||||
def test_small_copies_from_host_buf(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
buf1 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf2 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(host=True, nolru=True)).ensure_allocated()
|
||||
|
||||
for i in range(256):
|
||||
ctypes.memset(buf2._buf.va_addr, i, 1)
|
||||
|
||||
TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.copy(buf1._buf, buf2._buf, 1) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
assert buf1.as_memoryview()[0] == i
|
||||
|
||||
def test_small_copies_from_host_buf_intercopy(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
buf1 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf2 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf3 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(host=True, nolru=True)).ensure_allocated()
|
||||
|
||||
for i in range(256):
|
||||
ctypes.memset(buf3._buf.va_addr, i, 1)
|
||||
|
||||
TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.copy(buf1._buf, buf3._buf, 1) \
|
||||
.copy(buf2._buf, buf1._buf, 1) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
assert buf2.as_memoryview()[0] == i
|
||||
|
||||
def test_small_copies_from_host_buf_transfer(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
try: _ = Device[f"{Device.DEFAULT}:1"]
|
||||
except Exception: self.skipTest("no multidevice, test skipped")
|
||||
|
||||
buf1 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf2 = Buffer(f"{Device.DEFAULT}:1", 1, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf3 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(host=True, nolru=True)).ensure_allocated()
|
||||
TestHCQ.d0.allocator.map(buf2._buf)
|
||||
|
||||
for i in range(256):
|
||||
ctypes.memset(buf3._buf.va_addr, i, 1)
|
||||
|
||||
TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.copy(buf1._buf, buf3._buf, 1) \
|
||||
.copy(buf2._buf, buf1._buf, 1) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
assert buf2.as_memoryview()[0] == i
|
||||
|
||||
def test_memory_barrier(self):
|
||||
a = Tensor([0, 1], device=Device.DEFAULT, dtype=dtypes.int8).realize()
|
||||
b = a + 1
|
||||
prg = to_program(b.schedule_linear().src[-1].src[0], TestHCQ.d0.renderer)
|
||||
runtime = get_runtime(TestHCQ.d0.device, prg)
|
||||
|
||||
buf1 = Buffer(Device.DEFAULT, 2, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf2 = Buffer(Device.DEFAULT, 2, dtypes.int8, options=BufferSpec(cpu_access=True, nolru=True)).ensure_allocated()
|
||||
|
||||
kernargs_ptr = runtime.fill_kernargs([buf1._buf, buf2._buf])
|
||||
|
||||
for i in range(255):
|
||||
ctypes.memset(buf2._buf.va_addr, i, 2)
|
||||
|
||||
# Need memory_barrier after direct write to vram
|
||||
TestHCQ.d0.hw_compute_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.memory_barrier() \
|
||||
.exec(runtime, kernargs_ptr, prg.arg.global_size, prg.arg.local_size) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
assert buf1.as_memoryview()[0] == (i + 1), f"has {buf1.as_memoryview()[0]}, need {i + 1}"
|
||||
|
||||
def test_memory_barrier_before_copy(self):
|
||||
if TestHCQ.d0.hw_copy_queue_t is None: self.skipTest("device does not support copy queue")
|
||||
|
||||
buf1 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf2 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(nolru=True)).ensure_allocated()
|
||||
buf3 = Buffer(Device.DEFAULT, 1, dtypes.int8, options=BufferSpec(cpu_access=True, nolru=True)).ensure_allocated()
|
||||
|
||||
for i in range(256):
|
||||
ctypes.memset(buf3._buf.va_addr, i, 1)
|
||||
|
||||
# Need memory_barrier after direct write to vram
|
||||
TestHCQ.d0.hw_compute_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.memory_barrier() \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
TestHCQ.d0.hw_copy_queue_t().wait(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value - 1) \
|
||||
.copy(buf1._buf, buf3._buf, 1) \
|
||||
.copy(buf2._buf, buf1._buf, 1) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
assert buf2.as_memoryview()[0] == i
|
||||
|
||||
def test_write(self):
|
||||
buf = Buffer(Device.DEFAULT, 4, dtypes.uint32, options=BufferSpec(cpu_access=True, nolru=True)).ensure_allocated()
|
||||
|
||||
try:
|
||||
TestHCQ.d0.hw_compute_queue_t().write(buf._buf, 0x42) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
except NotImplementedError: self.skipTest("write not implemented")
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
assert buf.as_memoryview().cast("I")[0] == 0x42
|
||||
|
||||
def test_poll_bit_set(self):
|
||||
buf = Buffer(Device.DEFAULT, 4, dtypes.uint32, options=BufferSpec(cpu_access=True, nolru=True)).ensure_allocated()
|
||||
|
||||
try:
|
||||
TestHCQ.d0.hw_compute_queue_t().write(buf._buf, 0x01000000, b64=False) \
|
||||
.poll_bit(buf._buf, 0x01000000, 0x01000000) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
except NotImplementedError: self.skipTest("write/poll_bit not implemented")
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
def test_poll_bit_clear(self):
|
||||
buf = Buffer(Device.DEFAULT, 4, dtypes.uint32, options=BufferSpec(cpu_access=True, nolru=True)).ensure_allocated()
|
||||
|
||||
try:
|
||||
TestHCQ.d0.hw_compute_queue_t().write(buf._buf, 0xFE000000, b64=False) \
|
||||
.poll_bit(buf._buf, 0, 0x01000000) \
|
||||
.signal(TestHCQ.d0.timeline_signal, TestHCQ.d0.timeline_value).submit(TestHCQ.d0)
|
||||
except NotImplementedError: self.skipTest("write/poll_bit not implemented")
|
||||
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value)
|
||||
TestHCQ.d0.timeline_value += 1
|
||||
|
||||
def test_map_cpu_buffer_to_device(self):
|
||||
if Device[Device.DEFAULT].hw_copy_queue_t is None: self.skipTest("skip device without copy queue")
|
||||
|
||||
sz = 0x2000
|
||||
cpu_buffer = Buffer("CPU", sz, dtypes.uint8, options=BufferSpec(cpu_access=True)).ensure_allocated()
|
||||
cpu_buffer._buf.cpu_view().view(fmt='B')[:] = bytes([x & 0xff for x in range(sz)])
|
||||
|
||||
for devid in range(6):
|
||||
if DEBUG >= 2: print(f"Testing map to device {Device.DEFAULT}:{devid}")
|
||||
|
||||
try: d = Device[f"{Device.DEFAULT}:{devid}"]
|
||||
except Exception: break
|
||||
|
||||
local_buf = Buffer(f"{Device.DEFAULT}:{devid}", sz, dtypes.uint8, options=BufferSpec(cpu_access=True)).ensure_allocated()
|
||||
|
||||
d.allocator.map(cpu_buffer._buf)
|
||||
|
||||
d.hw_copy_queue_t().wait(d.timeline_signal, d.timeline_value - 1) \
|
||||
.copy(local_buf._buf, cpu_buffer._buf, sz) \
|
||||
.signal(d.timeline_signal, d.timeline_value).submit(d)
|
||||
d.timeline_signal.wait(d.timeline_value)
|
||||
d.timeline_value += 1
|
||||
|
||||
np.testing.assert_equal(cpu_buffer.numpy(), local_buf.numpy(), "failed")
|
||||
|
||||
@unittest.skipUnless(MOCKGPU and not (DEV.device == "AMD" and DEV.interface == "MOCKPCI"), "Emulate this on MOCKGPU to check the path in CI")
|
||||
def test_on_device_hang(self):
|
||||
if not hasattr(self.d0, 'on_device_hang'): self.skipTest("device does not have on_device_hang")
|
||||
|
||||
os.environ["MOCKGPU_EMU_FAULTADDR"] = "0xDEADBEE1"
|
||||
|
||||
# Check api calls
|
||||
with self.assertRaises(RuntimeError) as ctx:
|
||||
self.d0.on_device_hang()
|
||||
|
||||
assert "0xDEADBEE1" in str(ctx.exception)
|
||||
os.environ.pop("MOCKGPU_EMU_FAULTADDR")
|
||||
|
||||
def test_multidevice(self):
|
||||
try: amd_dev = Device["AMD"]
|
||||
except Exception: self.skipTest("no AMD device, test skipped")
|
||||
|
||||
try: nv_dev = Device["NV"]
|
||||
except Exception: self.skipTest("no NV device, test skipped")
|
||||
|
||||
x = amd_dev.new_signal()
|
||||
y = nv_dev.new_signal()
|
||||
assert type(x) is amd_dev.signal_t
|
||||
assert type(y) is nv_dev.signal_t
|
||||
|
||||
def test_multidevice_p2p(self):
|
||||
try:
|
||||
amd_dev = Device["AMD"]
|
||||
if not issubclass(type(amd_dev.iface), PCIIfaceBase): self.skipTest("Not a pci dev")
|
||||
except Exception: self.skipTest("no AMD device, test skipped")
|
||||
|
||||
try:
|
||||
nv_dev = Device["NV"]
|
||||
if not issubclass(type(nv_dev.iface), PCIIfaceBase): self.skipTest("Not a pci dev")
|
||||
except Exception: self.skipTest("no NV device, test skipped")
|
||||
|
||||
def _check_copy(dev1, dev2):
|
||||
buf1 = Tensor.randn(10, 10, device=dev1).realize()
|
||||
buf2 = buf1.to(dev2).realize()
|
||||
np.testing.assert_equal(buf1.numpy(), buf2.numpy(), "p2p failed")
|
||||
_check_copy("AMD", "NV")
|
||||
_check_copy("NV", "AMD")
|
||||
|
||||
def test_speed_cross_device_rdma_copy_bandwidth(self):
|
||||
try: d1 = Device[f"{Device.DEFAULT}:7"]
|
||||
except Exception: self.skipTest("no multidevice, test skipped")
|
||||
|
||||
if TestHCQ.d0.peer_group == d1.peer_group: self.skipTest("devices in same peer group, no RDMA path")
|
||||
|
||||
SZ = 200_000_000
|
||||
a = Buffer(Device.DEFAULT, SZ, dtypes.uint8, options=BufferSpec(nolru=True)).allocate()
|
||||
b = Buffer(f"{Device.DEFAULT}:7", SZ, dtypes.uint8, options=BufferSpec(nolru=True)).allocate()
|
||||
|
||||
# warmup
|
||||
TestHCQ.d0.allocator._transfer(a._buf, b._buf, SZ, src_dev=d1, dest_dev=TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value - 1)
|
||||
d1.timeline_signal.wait(d1.timeline_value - 1)
|
||||
|
||||
st = time.perf_counter()
|
||||
TestHCQ.d0.allocator._transfer(a._buf, b._buf, SZ, src_dev=d1, dest_dev=TestHCQ.d0)
|
||||
TestHCQ.d0.timeline_signal.wait(TestHCQ.d0.timeline_value - 1)
|
||||
d1.timeline_signal.wait(d1.timeline_value - 1)
|
||||
et_ms = (time.perf_counter() - st) * 1e3
|
||||
|
||||
gb_s = ((SZ / 1e9) / et_ms) * 1e3
|
||||
print(f"cross device rdma copy: {et_ms:.2f} ms, {gb_s:.2f} GB/s")
|
||||
assert 1 <= gb_s <= 100
|
||||
|
||||
np.testing.assert_equal(a.numpy(), b.numpy(), "failed")
|
||||
|
||||
if __name__ == "__main__":
|
||||
unittest.main()
|
||||
61
tinygrad_repo/test/device/test_metal.py
Normal file
61
tinygrad_repo/test/device/test_metal.py
Normal file
@@ -0,0 +1,61 @@
|
||||
import unittest
|
||||
from tinygrad.device import CompileError, Device, BufferSpec
|
||||
if Device.DEFAULT=="METAL":
|
||||
from tinygrad.runtime.ops_metal import MetalDevice, MetalCompiler, MetalProgram
|
||||
@unittest.skipIf(Device.DEFAULT!="METAL", "Metal support required")
|
||||
class TestMetal(unittest.TestCase):
|
||||
def test_alloc_oom(self):
|
||||
device = MetalDevice("metal")
|
||||
with self.assertRaises(MemoryError):
|
||||
device.allocator.alloc(10000000000000000000)
|
||||
|
||||
def test_compile_error(self):
|
||||
compiler = MetalCompiler()
|
||||
with self.assertRaises(CompileError):
|
||||
compiler.compile("this is not valid metal")
|
||||
|
||||
def test_compile_success(self):
|
||||
compiler = MetalCompiler()
|
||||
ret = compiler.compile("""
|
||||
#include <metal_stdlib>
|
||||
using namespace metal;
|
||||
kernel void E_4n1(device int* data0, const device int* data1, const device int* data2,
|
||||
uint3 gid [[threadgroup_position_in_grid]], uint3 lid [[thread_position_in_threadgroup]]) {
|
||||
int val0 = *(data1+0);
|
||||
int val1 = *(data1+1);
|
||||
int val2 = *(data1+2);
|
||||
int val3 = *(data1+3);
|
||||
int val4 = *(data2+0);
|
||||
int val5 = *(data2+1);
|
||||
int val6 = *(data2+2);
|
||||
int val7 = *(data2+3);
|
||||
*(data0+0) = (val0+val4);
|
||||
*(data0+1) = (val1+val5);
|
||||
*(data0+2) = (val2+val6);
|
||||
*(data0+3) = (val3+val7);
|
||||
}
|
||||
""")
|
||||
assert ret is not None
|
||||
|
||||
def test_failed_newLibraryWithData(self):
|
||||
device = MetalDevice("metal")
|
||||
compiler = MetalCompiler()
|
||||
compiled = compiler.compile("""
|
||||
#include <metal_stdlib>
|
||||
kernel void r_5(device int* data0, const device int* data1, uint3 gid [[threadgroup_position_in_grid]], uint3 lid [[thread_position_in_threadgroup]]){
|
||||
data0[0] = 0;
|
||||
}
|
||||
""")
|
||||
with self.assertRaises(RuntimeError):
|
||||
compiled = compiled[:40] # corrupt the compiled program
|
||||
MetalProgram(device, "r_5", compiled)
|
||||
|
||||
def test_free(self):
|
||||
size = 2**16
|
||||
device = Device['METAL']
|
||||
before = device.sysdevice.currentAllocatedSize()
|
||||
|
||||
buf = device.allocator.alloc(size, BufferSpec(nolru=True))
|
||||
self.assertEqual(curr:=device.sysdevice.currentAllocatedSize(), before+size, msg=f"{curr=} - {before=}")
|
||||
device.allocator.free(buf, buf.size, BufferSpec(nolru=True))
|
||||
self.assertEqual(curr:=device.sysdevice.currentAllocatedSize(), before, msg=f"{curr=} - {before=}")
|
||||
40
tinygrad_repo/test/device/test_ocl.py
Normal file
40
tinygrad_repo/test/device/test_ocl.py
Normal file
@@ -0,0 +1,40 @@
|
||||
import unittest
|
||||
from unittest.mock import patch
|
||||
from tinygrad import Device
|
||||
from tinygrad.device import Buffer
|
||||
from tinygrad.dtype import dtypes
|
||||
from tinygrad.runtime.ops_cl import CLDevice, CLAllocator, CLCompiler, CLProgram
|
||||
|
||||
@unittest.skipUnless(Device.DEFAULT == "CL", "Runs only on OpenCL")
|
||||
class TestCLCompileCache(unittest.TestCase):
|
||||
def test_compile_cached(self):
|
||||
device = Device[Device.DEFAULT]
|
||||
src = "__kernel void cached_test(__global int* a) { a[0] = 1; }"
|
||||
CLProgram(device, name="cached_test", lib=src.encode())
|
||||
with patch.object(CLCompiler, 'compile', side_effect=RuntimeError("compile should not be called on cache hit")):
|
||||
CLProgram(device, name="cached_test", lib=src.encode())
|
||||
|
||||
@unittest.skipUnless(Device.DEFAULT == "CL", "Runs only on OpenCL")
|
||||
class TestCLError(unittest.TestCase):
|
||||
@unittest.skip("allocates tons of memory")
|
||||
def test_oom(self):
|
||||
with self.assertRaises(RuntimeError) as err:
|
||||
allocator = CLAllocator(CLDevice())
|
||||
for i in range(1_000_000):
|
||||
allocator.alloc(1_000_000_000)
|
||||
assert str(err.exception) == "OpenCL Error -6: CL_OUT_OF_HOST_MEMORY"
|
||||
|
||||
def test_invalid_kernel_name(self):
|
||||
device = Device[Device.DEFAULT]
|
||||
with self.assertRaises(RuntimeError) as err:
|
||||
CLProgram(device, name="", lib="__kernel void test(__global int* a) { a[0] = 1; }".encode())
|
||||
assert str(err.exception) == "OpenCL Error -46: CL_INVALID_KERNEL_NAME"
|
||||
|
||||
def test_unaligned_copy(self):
|
||||
data = list(range(65))
|
||||
unaligned = memoryview(bytearray(data))[1:]
|
||||
buffer = Buffer("CL", 64, dtypes.uint8).allocate()
|
||||
buffer.copyin(unaligned)
|
||||
result = memoryview(bytearray(len(data) - 1))
|
||||
buffer.copyout(result)
|
||||
assert unaligned == result, "Unaligned data copied in must be equal to data copied out."
|
||||
40
tinygrad_repo/test/device/test_validate_with_cpu.py
Normal file
40
tinygrad_repo/test/device/test_validate_with_cpu.py
Normal file
@@ -0,0 +1,40 @@
|
||||
import unittest
|
||||
from tinygrad import Tensor, Context, Variable, Device
|
||||
from test.helpers import needs_second_gpu
|
||||
|
||||
class TestValidateWithCPU(unittest.TestCase):
|
||||
def setUp(self):
|
||||
self.ctx = Context(VALIDATE_WITH_CPU=1)
|
||||
self.ctx.__enter__()
|
||||
def tearDown(self): self.ctx.__exit__(None, None, None)
|
||||
|
||||
def test_add(self): self.assertListEqual((Tensor([1.,2,3])+Tensor([4.,5,6])).tolist(), [5.0, 7.0, 9.0])
|
||||
def test_mul(self): self.assertListEqual((Tensor([1.,2,3])*Tensor([4.,5,6])).tolist(), [4.0, 10.0, 18.0])
|
||||
def test_sum(self): self.assertEqual(Tensor([1.,2,3,4]).sum().item(), 10.0)
|
||||
def test_reduce_then_op(self): self.assertEqual((Tensor([1.,2,3,4]).sum() * 2).item(), 20.0)
|
||||
|
||||
def test_assign(self):
|
||||
a = Tensor([1.,2,3]).realize()
|
||||
a.assign(a + 1).realize()
|
||||
self.assertListEqual(a.tolist(), [2.0, 3.0, 4.0])
|
||||
|
||||
def test_buffer_view(self):
|
||||
self.assertListEqual((Tensor([1.,2,3,4,5,6,7,8])[2:6] + 1).tolist(), [4.0, 5.0, 6.0, 7.0])
|
||||
|
||||
def test_symbolic(self):
|
||||
i = Variable('i', 1, 10)
|
||||
ones = Tensor.ones(10).contiguous()
|
||||
self.assertListEqual((ones[:i.bind(5)] + 1).contiguous()[:5].tolist(), [2.0]*5)
|
||||
|
||||
def test_multi_kernel(self):
|
||||
a = (Tensor([1.,2,3]) + 1).contiguous()
|
||||
b = (a * 2).contiguous()
|
||||
self.assertListEqual((b - 1).tolist(), [3.0, 5.0, 7.0])
|
||||
|
||||
@needs_second_gpu
|
||||
def test_sharded(self):
|
||||
t = Tensor([1.,2,3,4]).shard((f"{Device.DEFAULT}:0", f"{Device.DEFAULT}:1"), axis=0)
|
||||
self.assertListEqual((t + 1).tolist(), [2.0, 3.0, 4.0, 5.0])
|
||||
|
||||
if __name__ == "__main__":
|
||||
unittest.main()
|
||||
Reference in New Issue
Block a user